[llvm] 24906aa - [ARM] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 4 02:22:19 PDT 2023
Author: Nikita Popov
Date: 2023-04-04T11:22:08+02:00
New Revision: 24906aa83e2b575a01e13a6f378d39b16cd0602c
URL: https://github.com/llvm/llvm-project/commit/24906aa83e2b575a01e13a6f378d39b16cd0602c
DIFF: https://github.com/llvm/llvm-project/commit/24906aa83e2b575a01e13a6f378d39b16cd0602c.diff
LOG: [ARM] Regenerate test checks (NFC)
Added:
Modified:
llvm/test/CodeGen/ARM/shifter_operand.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll
index c8d4a84b3cca..9775e0043684 100644
--- a/llvm/test/CodeGen/ARM/shifter_operand.ll
+++ b/llvm/test/CodeGen/ARM/shifter_operand.ll
@@ -1,14 +1,23 @@
-; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
-; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARM
-; RUN: llc -opaque-pointers=0 < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-THUMB
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-none-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-ARM
+; RUN: llc -opaque-pointers=0 < %s -mtriple=armv7-none-eabi -mcpu=cortex-a9 | FileCheck %s -check-prefix=CHECK-ARM
+; RUN: llc -opaque-pointers=0 < %s -mtriple=thumbv7m-none-eabi | FileCheck %s -check-prefix=CHECK-THUMB
; rdar://8576755
define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
-; CHECK-LABEL: test1:
-; CHECK-ARM: add r0, r0, r1, lsl r2
-; CHECK-THUMB: lsls r1, r2
-; CHECK-THUMB: add r0, r1
+; CHECK-ARM-LABEL: test1:
+; CHECK-ARM: @ %bb.0:
+; CHECK-ARM-NEXT: uxtb r2, r2
+; CHECK-ARM-NEXT: add r0, r0, r1, lsl r2
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test1:
+; CHECK-THUMB: @ %bb.0:
+; CHECK-THUMB-NEXT: uxtb r2, r2
+; CHECK-THUMB-NEXT: lsls r1, r2
+; CHECK-THUMB-NEXT: add r0, r1
+; CHECK-THUMB-NEXT: bx lr
%shift.upgrd.1 = zext i8 %sh to i32
%A = shl i32 %Y, %shift.upgrd.1
%B = add i32 %X, %A
@@ -16,10 +25,18 @@ define i32 @test1(i32 %X, i32 %Y, i8 %sh) {
}
define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
-; CHECK-LABEL: test2:
-; CHECK-ARM: bic r0, r0, r1, asr r2
-; CHECK-THUMB: asrs r1, r2
-; CHECK-THUMB: bics r0, r1
+; CHECK-ARM-LABEL: test2:
+; CHECK-ARM: @ %bb.0:
+; CHECK-ARM-NEXT: uxtb r2, r2
+; CHECK-ARM-NEXT: bic r0, r0, r1, asr r2
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test2:
+; CHECK-THUMB: @ %bb.0:
+; CHECK-THUMB-NEXT: uxtb r2, r2
+; CHECK-THUMB-NEXT: asrs r1, r2
+; CHECK-THUMB-NEXT: bics r0, r1
+; CHECK-THUMB-NEXT: bx lr
%shift.upgrd.2 = zext i8 %sh to i32
%A = ashr i32 %Y, %shift.upgrd.2
%B = xor i32 %A, -1
@@ -28,10 +45,20 @@ define i32 @test2(i32 %X, i32 %Y, i8 %sh) {
}
define i32 @test3(i32 %base, i32 %base2, i32 %offset) {
+; CHECK-ARM-LABEL: test3:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: ldr r0, [r0, r2, lsl #2]
+; CHECK-ARM-NEXT: ldr r1, [r1, r2, lsl #2]
+; CHECK-ARM-NEXT: add r0, r1, r0
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test3:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: ldr.w r0, [r0, r2, lsl #2]
+; CHECK-THUMB-NEXT: ldr.w r1, [r1, r2, lsl #2]
+; CHECK-THUMB-NEXT: add r0, r1
+; CHECK-THUMB-NEXT: bx lr
entry:
-; CHECK-LABEL: test3:
-; CHECK: ldr{{(.w)?}} r0, [r0, r2, lsl #2]
-; CHECK: ldr{{(.w)?}} r1, [r1, r2, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
@@ -46,12 +73,30 @@ entry:
declare i8* @malloc(...)
define fastcc void @test4(i16 %addr) nounwind {
+; CHECK-ARM-LABEL: test4:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: .save {r4, lr}
+; CHECK-ARM-NEXT: push {r4, lr}
+; CHECK-ARM-NEXT: mov r4, r0
+; CHECK-ARM-NEXT: bl malloc
+; CHECK-ARM-NEXT: sxth r1, r4
+; CHECK-ARM-NEXT: ldr r2, [r0, r1, lsl #2]
+; CHECK-ARM-NEXT: add r2, r2, #1
+; CHECK-ARM-NEXT: str r2, [r0, r1, lsl #2]
+; CHECK-ARM-NEXT: pop {r4, pc}
+;
+; CHECK-THUMB-LABEL: test4:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: .save {r4, lr}
+; CHECK-THUMB-NEXT: push {r4, lr}
+; CHECK-THUMB-NEXT: mov r4, r0
+; CHECK-THUMB-NEXT: bl malloc
+; CHECK-THUMB-NEXT: sxth r1, r4
+; CHECK-THUMB-NEXT: ldr.w r2, [r0, r1, lsl #2]
+; CHECK-THUMB-NEXT: adds r2, #1
+; CHECK-THUMB-NEXT: str.w r2, [r0, r1, lsl #2]
+; CHECK-THUMB-NEXT: pop {r4, pc}
entry:
-; CHECK-LABEL: test4:
-; CHECK: ldr{{(.w)?}} [[REG:r[0-9]+]], [r0, r1, lsl #2]
-; CHECK-NOT: ldr{{(.w)?}} [[REG:r[0-9]+]], [r0, r1, lsl #2]!
-; CHECK: str{{(.w)?}} [[REG]], [r0, r1, lsl #2]
-; CHECK-NOT: str{{(.w)?}} [[REG]], [r0]
%0 = tail call i8* (...) @malloc(i32 undef) nounwind
%1 = bitcast i8* %0 to i32*
%2 = sext i16 %addr to i32
@@ -63,12 +108,20 @@ entry:
}
define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_1:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r1, r0
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_1:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orrs r0, r1
+; CHECK-THUMB-NEXT: bx lr
entry:
-; CHECK-LABEL: test_orr_extract_from_mul_1
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-ARM: orr r0, r1, r0
-; CHECK-THUMB: muls r1, r2, r1
; CHECk-THUMB: orrs r0, r1
%mul = mul i32 %y, 63767
%or = or i32 %mul, %x
@@ -76,11 +129,19 @@ entry:
}
define i32 @test_orr_extract_from_mul_2(i32 %x, i32 %y) {
-; CHECK-LABEL: test_orr_extract_from_mul_2
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #1
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_2:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r0, r1, lsl #1
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_2:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orr.w r0, r0, r1, lsl #1
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 127534
%or = or i32 %mul1, %x
@@ -88,11 +149,19 @@ entry:
}
define i32 @test_orr_extract_from_mul_3(i32 %x, i32 %y) {
-; CHECK-LABEL: test_orr_extract_from_mul_3
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #2
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_3:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r0, r1, lsl #2
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_3:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orr.w r0, r0, r1, lsl #2
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 255068
%or = or i32 %mul1, %x
@@ -100,11 +169,19 @@ entry:
}
define i32 @test_orr_extract_from_mul_4(i32 %x, i32 %y) {
-; CHECK-LABEL: test_orr_extract_from_mul_4
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #3
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_4:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r0, r1, lsl #3
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_4:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orr.w r0, r0, r1, lsl #3
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 510136
%or = or i32 %mul1, %x
@@ -112,11 +189,19 @@ entry:
}
define i32 @test_orr_extract_from_mul_5(i32 %x, i32 %y) {
-; CHECK-LABEL: test_orr_extract_from_mul_5
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #4
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_5:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r0, r1, lsl #4
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_5:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orr.w r0, r0, r1, lsl #4
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 1020272
%or = or i32 %mul1, %x
@@ -124,11 +209,19 @@ entry:
}
define i32 @test_orr_extract_from_mul_6(i32 %x, i32 %y) {
-; CHECK-LABEL: test_orr_extract_from_mul_6
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: orr{{(.w)?}} r0, r0, r1, lsl #16
+; CHECK-ARM-LABEL: test_orr_extract_from_mul_6:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: orr r0, r0, r1, lsl #16
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_orr_extract_from_mul_6:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: orr.w r0, r0, r1, lsl #16
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul = mul i32 %y, -115933184
%or = or i32 %mul, %x
@@ -136,11 +229,19 @@ entry:
}
define i32 @test_load_extract_from_mul_1(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_1
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: ldrb r0, [r0, r1]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_1:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_1:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb r0, [r0, r1]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul = mul i32 %y, 63767
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
@@ -150,11 +251,19 @@ entry:
}
define i32 @test_load_extract_from_mul_2(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_2
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #1]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_2:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1, lsl #1]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_2:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb.w r0, [r0, r1, lsl #1]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 127534
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
@@ -164,11 +273,19 @@ entry:
}
define i32 @test_load_extract_from_mul_3(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_3
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #2]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_3:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1, lsl #2]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_3:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb.w r0, [r0, r1, lsl #2]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 255068
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
@@ -178,11 +295,19 @@ entry:
}
define i32 @test_load_extract_from_mul_4(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_4
-; CHECK: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK: ldrb{{(.w)?}} r0, [r0, r1, lsl #3]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_4:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1, lsl #3]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_4:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb.w r0, [r0, r1, lsl #3]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 510136
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
@@ -192,14 +317,20 @@ entry:
}
define i32 @test_load_extract_from_mul_5(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_5
-; CHECK-ARM: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-ARM: ldrb r0, [r0, r1, lsl #4]
-; CHECK-THUMB: movw r2, #37232
-; CHECK-THUMB: movt r2, #15
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK-THUMB: ldrb r0, [r0, r1]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_5:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1, lsl #4]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_5:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movw r2, #37232
+; CHECK-THUMB-NEXT: movt r2, #15
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb r0, [r0, r1]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul1 = mul i32 %y, 1020272
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul1
@@ -209,14 +340,20 @@ entry:
}
define i32 @test_load_extract_from_mul_6(i8* %x, i32 %y) {
-; CHECK-LABEL: test_load_extract_from_mul_6
-; CHECK-ARM: movw r2, #63767
-; CHECK-ARM: mul r1, r1, r2
-; CHECK-ARM: ldrb r0, [r0, r1, lsl #16]
-; CHECK-THUMB: movs r2, #0
-; CHECK-THUMB: movt r2, #63767
-; CHECK-THUMB: muls r1, r2, r1
-; CHECK-THUMB: ldrb r0, [r0, r1]
+; CHECK-ARM-LABEL: test_load_extract_from_mul_6:
+; CHECK-ARM: @ %bb.0: @ %entry
+; CHECK-ARM-NEXT: movw r2, #63767
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldrb r0, [r0, r1, lsl #16]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_load_extract_from_mul_6:
+; CHECK-THUMB: @ %bb.0: @ %entry
+; CHECK-THUMB-NEXT: movs r2, #0
+; CHECK-THUMB-NEXT: movt r2, #63767
+; CHECK-THUMB-NEXT: muls r1, r2, r1
+; CHECK-THUMB-NEXT: ldrb r0, [r0, r1]
+; CHECK-THUMB-NEXT: bx lr
entry:
%mul = mul i32 %y, -115933184
%arrayidx = getelementptr inbounds i8, i8* %x, i32 %mul
@@ -227,10 +364,21 @@ entry:
define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) {
-; CHECK-LABEL: test_well_formed_dag:
-; CHECK-ARM: movw [[SMALL_CONST:r[0-9]+]], #675
-; CHECK-ARM: mul [[SMALL_PROD:r[0-9]+]], r0, [[SMALL_CONST]]
-; CHECK-ARM: add {{r[0-9]+}}, r1, [[SMALL_PROD]], lsl #7
+; CHECK-ARM-LABEL: test_well_formed_dag:
+; CHECK-ARM: @ %bb.0:
+; CHECK-ARM-NEXT: movw r3, #675
+; CHECK-ARM-NEXT: mul r0, r0, r3
+; CHECK-ARM-NEXT: add r0, r1, r0, lsl #7
+; CHECK-ARM-NEXT: str r0, [r2]
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_well_formed_dag:
+; CHECK-THUMB: @ %bb.0:
+; CHECK-THUMB-NEXT: movw r3, #675
+; CHECK-THUMB-NEXT: muls r0, r3, r0
+; CHECK-THUMB-NEXT: add.w r0, r1, r0, lsl #7
+; CHECK-THUMB-NEXT: str r0, [r2]
+; CHECK-THUMB-NEXT: bx lr
%mul.small = mul i32 %in1, 675
store i32 %mul.small, i32* %addr
@@ -241,9 +389,23 @@ define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) {
}
define { i32, i32 } @test_multi_use_add(i32 %base, i32 %offset) {
-; CHECK-LABEL: test_multi_use_add:
-; CHECK-THUMB: movs [[CONST:r[0-9]+]], #28
-; CHECK-THUMB: movt [[CONST]], #1
+; CHECK-ARM-LABEL: test_multi_use_add:
+; CHECK-ARM: @ %bb.0:
+; CHECK-ARM-NEXT: movw r2, #28
+; CHECK-ARM-NEXT: movt r2, #1
+; CHECK-ARM-NEXT: mul r1, r1, r2
+; CHECK-ARM-NEXT: ldr r1, [r0, r1]!
+; CHECK-ARM-NEXT: bx lr
+;
+; CHECK-THUMB-LABEL: test_multi_use_add:
+; CHECK-THUMB: @ %bb.0:
+; CHECK-THUMB-NEXT: movs r3, #28
+; CHECK-THUMB-NEXT: movt r3, #1
+; CHECK-THUMB-NEXT: mla r2, r1, r3, r0
+; CHECK-THUMB-NEXT: muls r1, r3, r1
+; CHECK-THUMB-NEXT: ldr r1, [r0, r1]
+; CHECK-THUMB-NEXT: mov r0, r2
+; CHECK-THUMB-NEXT: bx lr
%prod = mul i32 %offset, 65564
%sum = add i32 %base, %prod
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