[llvm] 321d02c - [NFC] Update CodeGen/*/nomerge.ll tests with utils/update_llc_test_checks.py.
Zequan Wu via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 3 16:52:44 PDT 2023
Author: Zequan Wu
Date: 2023-04-03T19:52:39-04:00
New Revision: 321d02cc6b6a1116c227c172249b5cacf4d0deba
URL: https://github.com/llvm/llvm-project/commit/321d02cc6b6a1116c227c172249b5cacf4d0deba
DIFF: https://github.com/llvm/llvm-project/commit/321d02cc6b6a1116c227c172249b5cacf4d0deba.diff
LOG: [NFC] Update CodeGen/*/nomerge.ll tests with utils/update_llc_test_checks.py.
Precommit this patch for better diff view on D146749.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D147454
Added:
Modified:
llvm/test/CodeGen/AArch64/nomerge.ll
llvm/test/CodeGen/ARM/nomerge.ll
llvm/test/CodeGen/LoongArch/nomerge.ll
llvm/test/CodeGen/PowerPC/nomerge.ll
llvm/test/CodeGen/RISCV/nomerge.ll
llvm/test/CodeGen/SystemZ/nomerge.ll
llvm/test/CodeGen/X86/nomerge.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/nomerge.ll b/llvm/test/CodeGen/AArch64/nomerge.ll
index 4cab63b488872..7ff0abf628750 100644
--- a/llvm/test/CodeGen/AArch64/nomerge.ll
+++ b/llvm/test/CodeGen/AArch64/nomerge.ll
@@ -1,13 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 -o - | FileCheck %s
-define void @foo(i32 %i) uwtable {
+define void @foo(i32 %i) nounwind {
; CHECK-LABEL: foo:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
-; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: .cfi_offset w30, -16
-; CHECK-NEXT: .cfi_remember_state
; CHECK-NEXT: cmp w0, #7
; CHECK-NEXT: b.eq .LBB0_3
; CHECK-NEXT: // %bb.1: // %entry
@@ -16,16 +13,11 @@ define void @foo(i32 %i) uwtable {
; CHECK-NEXT: // %bb.2: // %if.then
; CHECK-NEXT: bl bar
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-NEXT: .cfi_def_cfa_offset 0
-; CHECK-NEXT: .cfi_restore w30
; CHECK-NEXT: b bar
; CHECK-NEXT: .LBB0_3: // %if.then2
-; CHECK-NEXT: .cfi_restore_state
; CHECK-NEXT: bl bar
; CHECK-NEXT: .LBB0_4: // %if.end3
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
-; CHECK-NEXT: .cfi_def_cfa_offset 0
-; CHECK-NEXT: .cfi_restore w30
; CHECK-NEXT: b bar
entry:
switch i32 %i, label %if.end3 [
@@ -46,6 +38,25 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: b bar
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
diff --git a/llvm/test/CodeGen/ARM/nomerge.ll b/llvm/test/CodeGen/ARM/nomerge.ll
index b4e01c0560cf7..cdfb40d44c445 100644
--- a/llvm/test/CodeGen/ARM/nomerge.ll
+++ b/llvm/test/CodeGen/ARM/nomerge.ll
@@ -1,6 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=arm -o - | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: push {r11, lr}
+; CHECK-NEXT: cmp r0, #7
+; CHECK-NEXT: beq .LBB0_3
+; CHECK-NEXT: @ %bb.1: @ %entry
+; CHECK-NEXT: cmp r0, #5
+; CHECK-NEXT: bne .LBB0_4
+; CHECK-NEXT: @ %bb.2: @ %if.then
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: pop {r11, lr}
+; CHECK-NEXT: b bar
+; CHECK-NEXT: .LBB0_3: @ %if.then2
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: .LBB0_4: @ %if.end3
+; CHECK-NEXT: pop {r11, lr}
+; CHECK-NEXT: b bar
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,17 +38,26 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: tst r0, #1
+; CHECK-NEXT: b bar
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: @ %bb.0: @ %entry
-; CHECK: @ %bb.1: @ %entry
-; CHECK: @ %bb.2: @ %if.then
-; CHECK-NEXT: bl bar
-; CHECK: b bar
-; CHECK: .LBB0_3: @ %if.then2
-; CHECK-NEXT: bl bar
-; CHECK: .LBB0_4: @ %if.end3
-; CHECK: b bar
diff --git a/llvm/test/CodeGen/LoongArch/nomerge.ll b/llvm/test/CodeGen/LoongArch/nomerge.ll
index e4aecd79993ea..2cf16de777428 100644
--- a/llvm/test/CodeGen/LoongArch/nomerge.ll
+++ b/llvm/test/CodeGen/LoongArch/nomerge.ll
@@ -1,6 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: addi.d $sp, $sp, -16
+; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
+; CHECK-NEXT: bstrpick.d $a0, $a0, 31, 0
+; CHECK-NEXT: ori $a1, $zero, 7
+; CHECK-NEXT: beq $a0, $a1, .LBB0_3
+; CHECK-NEXT: # %bb.1: # %entry
+; CHECK-NEXT: ori $a1, $zero, 5
+; CHECK-NEXT: bne $a0, $a1, .LBB0_4
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: bl %plt(bar)
+; CHECK-NEXT: b .LBB0_4
+; CHECK-NEXT: .LBB0_3: # %if.then2
+; CHECK-NEXT: bl %plt(bar)
+; CHECK-NEXT: .LBB0_4: # %if.end3
+; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
+; CHECK-NEXT: addi.d $sp, $sp, 16
+; CHECK-NEXT: b %plt(bar)
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,16 +40,26 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: andi $a0, $a0, 1
+; CHECK-NEXT: b %plt(bar)
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %entry
-; CHECK: # %bb.1: # %entry
-; CHECK: # %bb.2: # %if.then
-; CHECK-NEXT: bl %plt(bar)
-; CHECK: .LBB0_3: # %if.then2
-; CHECK-NEXT: bl %plt(bar)
-; CHECK: .LBB0_4: # %if.end3
-; CHECK: b %plt(bar)
diff --git a/llvm/test/CodeGen/PowerPC/nomerge.ll b/llvm/test/CodeGen/PowerPC/nomerge.ll
index 4e3db233e3ce0..4cf0154bd9ac5 100644
--- a/llvm/test/CodeGen/PowerPC/nomerge.ll
+++ b/llvm/test/CodeGen/PowerPC/nomerge.ll
@@ -1,6 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=powerpc -o - | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: stwu 1, -16(1)
+; CHECK-NEXT: cmplwi 3, 7
+; CHECK-NEXT: stw 0, 20(1)
+; CHECK-NEXT: beq 0, .LBB0_3
+; CHECK-NEXT: # %bb.1: # %entry
+; CHECK-NEXT: cmplwi 3, 5
+; CHECK-NEXT: bne 0, .LBB0_4
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: b .LBB0_4
+; CHECK-NEXT: .LBB0_3: # %if.then2
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: .LBB0_4: # %if.end3
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: lwz 0, 20(1)
+; CHECK-NEXT: addi 1, 1, 16
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,16 +42,39 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: stwu 1, -16(1)
+; CHECK-NEXT: andi. 3, 3, 1
+; CHECK-NEXT: stw 0, 20(1)
+; CHECK-NEXT: bc 4, 1, .LBB1_2
+; CHECK-NEXT: # %bb.1: # %if.then
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: b .LBB1_3
+; CHECK-NEXT: .LBB1_2: # %if.else
+; CHECK-NEXT: bl bar
+; CHECK-NEXT: .LBB1_3: # %if.end
+; CHECK-NEXT: lwz 0, 20(1)
+; CHECK-NEXT: addi 1, 1, 16
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %entry
-; CHECK: # %bb.1: # %entry
-; CHECK: # %bb.2: # %if.then
-; CHECK-NEXT: bl bar
-; CHECK: .LBB0_3: # %if.then2
-; CHECK-NEXT: bl bar
-; CHECK: .LBB0_4: # %if.end3
-; CHECK-NEXT: bl bar
diff --git a/llvm/test/CodeGen/RISCV/nomerge.ll b/llvm/test/CodeGen/RISCV/nomerge.ll
index c35c708d0fcbf..830b3306bfeb1 100644
--- a/llvm/test/CodeGen/RISCV/nomerge.ll
+++ b/llvm/test/CodeGen/RISCV/nomerge.ll
@@ -1,6 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=riscv64 -o - | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: addi sp, sp, -16
+; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
+; CHECK-NEXT: sext.w a0, a0
+; CHECK-NEXT: li a1, 7
+; CHECK-NEXT: beq a0, a1, .LBB0_3
+; CHECK-NEXT: # %bb.1: # %entry
+; CHECK-NEXT: li a1, 5
+; CHECK-NEXT: bne a0, a1, .LBB0_4
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: call bar at plt
+; CHECK-NEXT: j .LBB0_4
+; CHECK-NEXT: .LBB0_3: # %if.then2
+; CHECK-NEXT: call bar at plt
+; CHECK-NEXT: .LBB0_4: # %if.end3
+; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
+; CHECK-NEXT: addi sp, sp, 16
+; CHECK-NEXT: tail bar at plt
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,16 +40,26 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: andi a0, a0, 1
+; CHECK-NEXT: tail bar at plt
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %entry
-; CHECK: # %bb.1: # %entry
-; CHECK: # %bb.2: # %if.then
-; CHECK-NEXT: call bar
-; CHECK: .LBB0_3: # %if.then2
-; CHECK-NEXT: call bar
-; CHECK: .LBB0_4: # %if.end3
-; CHECK: tail bar
diff --git a/llvm/test/CodeGen/SystemZ/nomerge.ll b/llvm/test/CodeGen/SystemZ/nomerge.ll
index 6ccbf9a1bfc1e..7b8584b958c85 100644
--- a/llvm/test/CodeGen/SystemZ/nomerge.ll
+++ b/llvm/test/CodeGen/SystemZ/nomerge.ll
@@ -1,6 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=s390x-linux-gnu -o - | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
+; CHECK-NEXT: aghi %r15, -160
+; CHECK-NEXT: cije %r2, 7, .LBB0_3
+; CHECK-NEXT: # %bb.1: # %entry
+; CHECK-NEXT: cijlh %r2, 5, .LBB0_4
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: brasl %r14, bar at PLT
+; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
+; CHECK-NEXT: jg bar at PLT
+; CHECK-NEXT: .LBB0_3: # %if.then2
+; CHECK-NEXT: brasl %r14, bar at PLT
+; CHECK-NEXT: .LBB0_4: # %if.end3
+; CHECK-NEXT: lmg %r14, %r15, 272(%r15)
+; CHECK-NEXT: jg bar at PLT
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,17 +37,26 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: tmll %r2, 1
+; CHECK-NEXT: jg bar at PLT
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %entry
-; CHECK: # %bb.1: # %entry
-; CHECK: # %bb.2: # %if.then
-; CHECK-NEXT: brasl %r14, bar at PLT
-; CHECK: jg bar at PLT
-; CHECK: .LBB0_3: # %if.then2
-; CHECK: brasl %r14, bar at PLT
-; CHECK: .LBB0_4: # %if.end3
-; CHECK: jg bar at PLT
diff --git a/llvm/test/CodeGen/X86/nomerge.ll b/llvm/test/CodeGen/X86/nomerge.ll
index 4b845ce430ce8..70a4e98dc98be 100644
--- a/llvm/test/CodeGen/X86/nomerge.ll
+++ b/llvm/test/CodeGen/X86/nomerge.ll
@@ -1,6 +1,24 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=x86_64 -o - | FileCheck %s
-define void @foo(i32 %i) {
+define void @foo(i32 %i) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: cmpl $7, %edi
+; CHECK-NEXT: je .LBB0_3
+; CHECK-NEXT: # %bb.1: # %entry
+; CHECK-NEXT: cmpl $5, %edi
+; CHECK-NEXT: jne .LBB0_4
+; CHECK-NEXT: # %bb.2: # %if.then
+; CHECK-NEXT: callq bar
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: jmp bar # TAILCALL
+; CHECK-NEXT: .LBB0_3: # %if.then2
+; CHECK-NEXT: callq bar
+; CHECK-NEXT: .LBB0_4: # %if.end3
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: jmp bar # TAILCALL
entry:
switch i32 %i, label %if.end3 [
i32 5, label %if.then
@@ -20,17 +38,26 @@ if.end3:
ret void
}
+define void @foo_tail(i1 %i) nounwind {
+; CHECK-LABEL: foo_tail:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: testb $1, %dil
+; CHECK-NEXT: jmp bar # TAILCALL
+entry:
+ br i1 %i, label %if.then, label %if.else
+
+if.then:
+ tail call void @bar() #0
+ br label %if.end
+
+if.else:
+ tail call void @bar() #0
+ br label %if.end
+
+if.end:
+ ret void
+}
+
declare dso_local void @bar()
attributes #0 = { nomerge }
-
-; CHECK-LABEL: foo:
-; CHECK: # %bb.0: # %entry
-; CHECK: # %bb.1: # %entry
-; CHECK: # %bb.2: # %if.then
-; CHECK-NEXT: callq bar
-; CHECK: jmp bar # TAILCALL
-; CHECK: .LBB0_3: # %if.then2
-; CHECK: callq bar
-; CHECK: .LBB0_4: # %if.end3
-; CHECK: jmp bar # TAILCALL
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