[PATCH] D146749: [CodeGen] Fix nomerge attribute not working in tail calls.

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 3 08:56:20 PDT 2023


jrtc27 added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6301
       }
-      // Copy the object to parameter save area if it can not be entirely passed 
+      // Copy the object to parameter save area if it can not be entirely passed
       // by registers.
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Leave whitespace not in the code you're touching alone


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Comment at: llvm/test/CodeGen/AArch64/nomerge.ll:30
 ; CHECK-NEXT:    b bar
+
 entry:
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Where did this come from?


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Comment at: llvm/test/CodeGen/AArch64/nomerge.ll:50
 
+define void @foo_tail(i1 %i) {
+; CHECK-LABEL: foo_tail:
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Precommit all these?


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Comment at: llvm/test/CodeGen/ARM/nomerge.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc < %s -mtriple=arm -o - | FileCheck %s
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This conversion should likely be precommitted to highlight the actual diff


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Comment at: llvm/test/CodeGen/RISCV/nomerge.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc < %s -mtriple=riscv64 -o - | FileCheck %s
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Ugh, D79537 added this without getting a RISC-V contributor's review (Craig wasn't yet one)... like the others, convert this separately


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Comment at: llvm/test/CodeGen/RISCV/nomerge.ll:8
+; CHECK-NEXT:    addi sp, sp, -16
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
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These tests could benefit from nounwind to trim irrelevant CFI directives


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146749/new/

https://reviews.llvm.org/D146749



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