[PATCH] D147235: [AArch64] Remove redundant `mov 0` instruction for high 64-bits
JinGu Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 3 02:59:39 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG932911d6b10a: [AArch64] Remove redundant `mov 0` instruction for high 64-bits (authored by jaykang10).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D147235/new/
https://reviews.llvm.org/D147235
Files:
llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
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