[llvm] b5f207e - [SelectionDAG] Rename Flag->Glue. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 2 19:59:43 PDT 2023
Author: Craig Topper
Date: 2023-04-02T19:46:51-07:00
New Revision: b5f207e5b259c8cd2833a4a4f3301cf302be1630
URL: https://github.com/llvm/llvm-project/commit/b5f207e5b259c8cd2833a4a4f3301cf302be1630
DIFF: https://github.com/llvm/llvm-project/commit/b5f207e5b259c8cd2833a4a4f3301cf302be1630.diff
LOG: [SelectionDAG] Rename Flag->Glue. NFC
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index f94994a901b11..ffc7dbcf81dd9 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4755,7 +4755,7 @@ class TargetLowering : public TargetLoweringBase {
SelectionDAG &DAG) const;
// Lower custom output constraints. If invalid, return SDValue().
- virtual SDValue LowerAsmOutputForConstraint(SDValue &Chain, SDValue &Flag,
+ virtual SDValue LowerAsmOutputForConstraint(SDValue &Chain, SDValue &Glue,
const SDLoc &DL,
const AsmOperandInfo &OpInfo,
SelectionDAG &DAG) const;
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index c19cbec4702a5..14d1d0259aaeb 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -834,7 +834,7 @@ RegsForValue::RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
FunctionLoweringInfo &FuncInfo,
const SDLoc &dl, SDValue &Chain,
- SDValue *Flag, const Value *V) const {
+ SDValue *Glue, const Value *V) const {
// A Value with type {} or [0 x %t] needs no registers.
if (ValueVTs.empty())
return SDValue();
@@ -856,11 +856,11 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
Parts.resize(NumRegs);
for (unsigned i = 0; i != NumRegs; ++i) {
SDValue P;
- if (!Flag) {
+ if (!Glue) {
P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT);
} else {
- P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Flag);
- *Flag = P.getValue(2);
+ P = DAG.getCopyFromReg(Chain, dl, Regs[Part+i], RegisterVT, *Glue);
+ *Glue = P.getValue(2);
}
Chain = P.getValue(1);
@@ -919,7 +919,7 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG,
}
void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
- const SDLoc &dl, SDValue &Chain, SDValue *Flag,
+ const SDLoc &dl, SDValue &Chain, SDValue *Glue,
const Value *V,
ISD::NodeType PreferredExtendType) const {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
@@ -948,18 +948,18 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
SmallVector<SDValue, 8> Chains(NumRegs);
for (unsigned i = 0; i != NumRegs; ++i) {
SDValue Part;
- if (!Flag) {
+ if (!Glue) {
Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i]);
} else {
- Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Flag);
- *Flag = Part.getValue(1);
+ Part = DAG.getCopyToReg(Chain, dl, Regs[i], Parts[i], *Glue);
+ *Glue = Part.getValue(1);
}
Chains[i] = Part.getValue(0);
}
- if (NumRegs == 1 || Flag)
- // If NumRegs > 1 && Flag is used then the use of the last CopyToReg is
+ if (NumRegs == 1 || Glue)
+ // If NumRegs > 1 && Glue is used then the use of the last CopyToReg is
// flagged to it. That is the CopyToReg nodes and the user are considered
// a single scheduling unit. If we create a TokenFactor and return it as
// chain, then the TokenFactor is both a predecessor (operand) of the
@@ -8917,7 +8917,7 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
// We won't need to flush pending loads if this asm doesn't touch
// memory and is nonvolatile.
- SDValue Flag, Chain = (HasSideEffect) ? getRoot() : DAG.getRoot();
+ SDValue Glue, Chain = (HasSideEffect) ? getRoot() : DAG.getRoot();
bool EmitEHLabels = isa<InvokeInst>(Call);
if (EmitEHLabels) {
@@ -9144,7 +9144,7 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
SDLoc dl = getCurSDLoc();
// Use the produced MatchedRegs object to
- MatchedRegs.getCopyToRegs(InOperandVal, DAG, dl, Chain, &Flag, &Call);
+ MatchedRegs.getCopyToRegs(InOperandVal, DAG, dl, Chain, &Glue, &Call);
MatchedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse,
true, OpInfo.getMatchedOperand(), dl,
DAG, AsmNodeOperands);
@@ -9278,7 +9278,7 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
SDLoc dl = getCurSDLoc();
- OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, dl, Chain, &Flag,
+ OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, dl, Chain, &Glue,
&Call);
OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
@@ -9298,12 +9298,12 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
// Finish up input operands. Set the input chain and add the flag last.
AsmNodeOperands[InlineAsm::Op_InputChain] = Chain;
- if (Flag.getNode()) AsmNodeOperands.push_back(Flag);
+ if (Glue.getNode()) AsmNodeOperands.push_back(Glue);
unsigned ISDOpc = IsCallBr ? ISD::INLINEASM_BR : ISD::INLINEASM;
Chain = DAG.getNode(ISDOpc, getCurSDLoc(),
DAG.getVTList(MVT::Other, MVT::Glue), AsmNodeOperands);
- Flag = Chain.getValue(1);
+ Glue = Chain.getValue(1);
// Do additional work to generate outputs.
@@ -9361,11 +9361,11 @@ void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call,
case TargetLowering::C_Register:
case TargetLowering::C_RegisterClass:
Val = OpInfo.AssignedRegs.getCopyFromRegs(DAG, FuncInfo, getCurSDLoc(),
- Chain, &Flag, &Call);
+ Chain, &Glue, &Call);
break;
case TargetLowering::C_Immediate:
case TargetLowering::C_Other:
- Val = TLI.LowerAsmOutputForConstraint(Chain, Flag, getCurSDLoc(),
+ Val = TLI.LowerAsmOutputForConstraint(Chain, Glue, getCurSDLoc(),
OpInfo, DAG);
break;
case TargetLowering::C_Memory:
@@ -9596,7 +9596,7 @@ void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
assert(CI.getType()->isVoidTy() && "Stackmap cannot return a value.");
- SDValue Chain, InFlag, Callee;
+ SDValue Chain, InGlue, Callee;
SmallVector<SDValue, 32> Ops;
SDLoc DL = getCurSDLoc();
@@ -9613,11 +9613,11 @@ void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
// chain, flag = CALLSEQ_END(chain, 0, 0, flag)
//
Chain = DAG.getCALLSEQ_START(getRoot(), 0, 0, DL);
- InFlag = Chain.getValue(1);
+ InGlue = Chain.getValue(1);
// Add the STACKMAP operands, starting with DAG house-keeping.
Ops.push_back(Chain);
- Ops.push_back(InFlag);
+ Ops.push_back(InGlue);
// Add the <id>, <numShadowBytes> operands.
//
@@ -9641,9 +9641,9 @@ void SelectionDAGBuilder::visitStackmap(const CallInst &CI) {
// Create the STACKMAP node.
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
Chain = DAG.getNode(ISD::STACKMAP, DL, NodeTys, Ops);
- InFlag = Chain.getValue(1);
+ InGlue = Chain.getValue(1);
- Chain = DAG.getCALLSEQ_END(Chain, 0, 0, InFlag, DL);
+ Chain = DAG.getCALLSEQ_END(Chain, 0, 0, InGlue, DL);
// Stackmaps don't generate values, so nothing goes into the NodeMap.
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
index c9664ff82c333..6e92f6abf0277 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
@@ -766,7 +766,7 @@ struct RegsForValue {
/// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
/// flag is used.
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
- const SDLoc &dl, SDValue &Chain, SDValue *Flag,
+ const SDLoc &dl, SDValue &Chain, SDValue *Glue,
const Value *V = nullptr) const;
/// Emit a series of CopyToReg nodes that copies the specified value into the
@@ -775,7 +775,7 @@ struct RegsForValue {
/// flag is used. If V is not nullptr, then it is used in printing better
/// diagnostic messages on error.
void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
- SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
+ SDValue &Chain, SDValue *Glue, const Value *V = nullptr,
ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
/// Add this value to the specified inlineasm node operand list. This adds the
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index bdbf32aee6fbe..65dd80f5eb084 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2318,7 +2318,7 @@ void SelectionDAGISel::Select_STACKMAP(SDNode *N) {
// Stash the chain and glue operands so we can move them to the end.
SDValue Chain = *It++;
- SDValue InFlag = *It++;
+ SDValue InGlue = *It++;
// <id> operand.
SDValue ID = *It++;
@@ -2335,7 +2335,7 @@ void SelectionDAGISel::Select_STACKMAP(SDNode *N) {
pushStackMapLiveVariable(Ops, *It, DL);
Ops.push_back(Chain);
- Ops.push_back(InFlag);
+ Ops.push_back(InGlue);
SDVTList NodeTys = CurDAG->getVTList(MVT::Other, MVT::Glue);
CurDAG->SelectNodeTo(N, TargetOpcode::STACKMAP, NodeTys, Ops);
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index dd860155cf856..55f716a45ca91 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -5235,7 +5235,7 @@ const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const {
}
SDValue TargetLowering::LowerAsmOutputForConstraint(
- SDValue &Chain, SDValue &Flag, const SDLoc &DL,
+ SDValue &Chain, SDValue &Glue, const SDLoc &DL,
const AsmOperandInfo &OpInfo, SelectionDAG &DAG) const {
return SDValue();
}
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