[llvm] 4b515ee - [X86] truncateAVX512SetCCNoBWI - pass SDLoc argument by const-ref
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 2 13:04:25 PDT 2023
Author: Simon Pilgrim
Date: 2023-04-02T20:56:54+01:00
New Revision: 4b515ee6405287e3b16a4edb4ba83451e8bc0dfe
URL: https://github.com/llvm/llvm-project/commit/4b515ee6405287e3b16a4edb4ba83451e8bc0dfe
DIFF: https://github.com/llvm/llvm-project/commit/4b515ee6405287e3b16a4edb4ba83451e8bc0dfe.diff
LOG: [X86] truncateAVX512SetCCNoBWI - pass SDLoc argument by const-ref
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 64057de11af5..21f0b733bb17 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -54229,8 +54229,8 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
/// pre-promote its result type since vXi1 vectors don't get promoted
/// during type legalization.
static SDValue truncateAVX512SetCCNoBWI(EVT VT, EVT OpVT, SDValue LHS,
- SDValue RHS, ISD::CondCode CC, SDLoc DL,
- SelectionDAG &DAG,
+ SDValue RHS, ISD::CondCode CC,
+ const SDLoc &DL, SelectionDAG &DAG,
const X86Subtarget &Subtarget) {
if (Subtarget.hasAVX512() && !Subtarget.hasBWI() && VT.isVector() &&
VT.getVectorElementType() == MVT::i1 &&
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