[llvm] 2a2e216 - [X86] combineExtractVectorElt - call hasOneUse() as late as possible. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 2 09:55:45 PDT 2023
Author: Simon Pilgrim
Date: 2023-04-02T17:55:15+01:00
New Revision: 2a2e21625fd499359f53f13a5f712fbe224db71b
URL: https://github.com/llvm/llvm-project/commit/2a2e21625fd499359f53f13a5f712fbe224db71b
DIFF: https://github.com/llvm/llvm-project/commit/2a2e21625fd499359f53f13a5f712fbe224db71b.diff
LOG: [X86] combineExtractVectorElt - call hasOneUse() as late as possible. NFCI.
MMX conversion is very unlikely, so check the value types first, and make the more expensive hasOneUse() call as late as possible.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e012026917f82..d3400ad537e47 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45728,24 +45728,19 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
}
// Detect mmx extraction of all bits as a i64. It works better as a bitcast.
- if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() &&
- VT == MVT::i64 && SrcVT == MVT::v1i64 && isNullConstant(EltIdx)) {
- SDValue MMXSrc = InputVector.getOperand(0);
-
- // The bitcast source is a direct mmx result.
- if (MMXSrc.getValueType() == MVT::x86mmx)
- return DAG.getBitcast(VT, InputVector);
- }
+ if (VT == MVT::i64 && SrcVT == MVT::v1i64 &&
+ InputVector.getOpcode() == ISD::BITCAST &&
+ InputVector.getOperand(0).getValueType() == MVT::x86mmx &&
+ isNullConstant(EltIdx) && InputVector.hasOneUse())
+ return DAG.getBitcast(VT, InputVector);
// Detect mmx to i32 conversion through a v2i32 elt extract.
- if (InputVector.getOpcode() == ISD::BITCAST && InputVector.hasOneUse() &&
- VT == MVT::i32 && SrcVT == MVT::v2i32 && isNullConstant(EltIdx)) {
- SDValue MMXSrc = InputVector.getOperand(0);
-
- // The bitcast source is a direct mmx result.
- if (MMXSrc.getValueType() == MVT::x86mmx)
- return DAG.getNode(X86ISD::MMX_MOVD2W, dl, MVT::i32, MMXSrc);
- }
+ if (VT == MVT::i32 && SrcVT == MVT::v2i32 &&
+ InputVector.getOpcode() == ISD::BITCAST &&
+ InputVector.getOperand(0).getValueType() == MVT::x86mmx &&
+ isNullConstant(EltIdx) && InputVector.hasOneUse())
+ return DAG.getNode(X86ISD::MMX_MOVD2W, dl, MVT::i32,
+ InputVector.getOperand(0));
// Check whether this extract is the root of a sum of absolute
diff erences
// pattern. This has to be done here because we really want it to happen
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