[llvm] 4bbbae6 - [RISCV] Fix Zfa fceil/ffloor codegen bugs

[Craig Topper via llvm-commits]

Author: Jun Sha (Joshua)
Date: 2023-03-31T12:19:02-07:00
New Revision: 4bbbae61d3f13fa21425aee76d26f4d8d8cbc67f

URL: https://github.com/llvm/llvm-project/commit/4bbbae61d3f13fa21425aee76d26f4d8d8cbc67f
DIFF: https://github.com/llvm/llvm-project/commit/4bbbae61d3f13fa21425aee76d26f4d8d8cbc67f.diff

LOG: [RISCV] Fix Zfa fceil/ffloor codegen bugs

D143982 confused ceil and floor. Ceil should use fround instructions with 'rup' and floor should use 'rdn'.

Differential Revision: https://reviews.llvm.org/D146516

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    llvm/test/CodeGen/RISCV/double-zfa.ll
    llvm/test/CodeGen/RISCV/float-zfa.ll
    llvm/test/CodeGen/RISCV/half-zfa.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
index 108ea4d18fc7f..ffcd686db3e99 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
@@ -197,8 +197,8 @@ def: Pat<(any_frint FPR32:$rs1), (FROUNDNX_S FPR32:$rs1, 0b111)>;
 def: Pat<(any_fnearbyint FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b100)>;
-def: Pat<(any_ffloor FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR32:$rs1), (FROUND_S FPR32:$rs1, 0b001)>;
 
 def: PatSetCC<FPR32, strict_fsetcc, SETLT, FLTQ_S>;
@@ -220,8 +220,8 @@ def: Pat<(any_fnearbyint FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b100)>;
 def: Pat<(any_froundeven FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b000)>;
-def: Pat<(any_ffloor FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR64:$rs1), (FROUND_D FPR64:$rs1, 0b001)>;
 
 def: PatSetCC<FPR64, strict_fsetcc, SETLT, FLTQ_D>;
@@ -248,8 +248,8 @@ def: Pat<(any_fnearbyint FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b111)>;
 
 def: Pat<(any_fround FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b100)>;
 def: Pat<(any_froundeven FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b000)>;
-def: Pat<(any_ffloor FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b011)>;
-def: Pat<(any_fceil FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b010)>;
+def: Pat<(any_ffloor FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b010)>;
+def: Pat<(any_fceil FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b011)>;
 def: Pat<(any_ftrunc FPR16:$rs1), (FROUND_H FPR16:$rs1, 0b001)>;
 
 def: PatSetCC<FPR16, strict_fsetcc, SETLT, FLTQ_H>;

diff  --git a/llvm/test/CodeGen/RISCV/double-zfa.ll b/llvm/test/CodeGen/RISCV/double-zfa.ll
index 9dcb0c93562c3..881430f6f5ffd 100644
--- a/llvm/test/CodeGen/RISCV/double-zfa.ll
+++ b/llvm/test/CodeGen/RISCV/double-zfa.ll
@@ -170,7 +170,7 @@ declare double @round(double) nounwind readnone
 define double @fround_d_2(double %a) nounwind {
 ; CHECK-LABEL: fround_d_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.d fa0, fa0, rup
+; CHECK-NEXT:    fround.d fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call double @floor(double %a) nounwind readnone
   ret double %call
@@ -182,7 +182,7 @@ declare double @floor(double) nounwind readnone
 define double @fround_d_3(double %a) nounwind {
 ; CHECK-LABEL: fround_d_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.d fa0, fa0, rdn
+; CHECK-NEXT:    fround.d fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call double @ceil(double %a) nounwind readnone
   ret double %call

diff  --git a/llvm/test/CodeGen/RISCV/float-zfa.ll b/llvm/test/CodeGen/RISCV/float-zfa.ll
index e56ab8c9107fa..94da29bd6bece 100644
--- a/llvm/test/CodeGen/RISCV/float-zfa.ll
+++ b/llvm/test/CodeGen/RISCV/float-zfa.ll
@@ -125,7 +125,7 @@ declare float @roundf(float) nounwind readnone
 define float @fround_s_2(float %a) nounwind {
 ; CHECK-LABEL: fround_s_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.s fa0, fa0, rup
+; CHECK-NEXT:    fround.s fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call float @floorf(float %a) nounwind readnone
   ret float %call
@@ -137,7 +137,7 @@ declare float @floorf(float) nounwind readnone
 define float @fround_s_3(float %a) nounwind {
 ; CHECK-LABEL: fround_s_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.s fa0, fa0, rdn
+; CHECK-NEXT:    fround.s fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call float @ceilf(float %a) nounwind readnone
   ret float %call

diff  --git a/llvm/test/CodeGen/RISCV/half-zfa.ll b/llvm/test/CodeGen/RISCV/half-zfa.ll
index 798977e540047..732075e186b29 100644
--- a/llvm/test/CodeGen/RISCV/half-zfa.ll
+++ b/llvm/test/CodeGen/RISCV/half-zfa.ll
@@ -41,7 +41,7 @@ declare half @llvm.round.f16(half) nounwind readnone
 define half @fround_h_2(half %a) nounwind {
 ; CHECK-LABEL: fround_h_2:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.h fa0, fa0, rup
+; CHECK-NEXT:    fround.h fa0, fa0, rdn
 ; CHECK-NEXT:    ret
   %call = tail call half @llvm.floor.f16(half %a) nounwind readnone
   ret half %call
@@ -53,7 +53,7 @@ declare half @llvm.floor.f16(half) nounwind readnone
 define half @fround_h_3(half %a) nounwind {
 ; CHECK-LABEL: fround_h_3:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    fround.h fa0, fa0, rdn
+; CHECK-NEXT:    fround.h fa0, fa0, rup
 ; CHECK-NEXT:    ret
   %call = tail call half @llvm.ceil.f16(half %a) nounwind readnone
   ret half %call