[PATCH] D147245: [AMDGPU] Make amdgcn.s.buffer.load a memory-reading intrinsic

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D147245#4236143 <https://reviews.llvm.org/D147245#4236143>, @foad wrote:

> I had a quick look at some codegen differences this caused in Vulkan shaders compiled by LLPC <https://github.com/GPUOpen-Drivers/llpc>. The biggest difference was that the DAG nodes for scalar loads now have a chain operand, which has a big effect on DAG scheduling.

Oh right, I forgot about the DAG chaining. The chain must be determined by the declaration (otherwise code would have to randomly support chained and unchained variants of memory intrinsics)


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