[PATCH] D147264: [DAG] Add SelectionDAG::SplitScalar helper

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7431-7432
     // Split the quotient into low and high parts.
-    SDValue QuotL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HiLoVT, Quotient,
-                                DAG.getIntPtrConstant(0, dl));
-    SDValue QuotH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HiLoVT, Quotient,
-                                DAG.getIntPtrConstant(1, dl));
+    SDValue QuotL, QuotH;
+    std::tie(QuotL, QuotH) = DAG.SplitScalar(Quotient, dl, HiLoVT, HiLoVT);
     Result.push_back(QuotL);
----------------
barannikov88 wrote:
> (optional) It would be one line less with structured bindings.
Does the coding standards encourage these yet? We tend to avoid auto etc. in most cases unless the type is already explicit/obvious - casts etc.

https://llvm.org/docs/CodingStandards.html#use-auto-type-deduction-to-make-code-more-readable


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:1945-1948
     SDValue Mulhi1_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1,
                                     Zero);
     SDValue Mulhi1_Hi =
         DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, Mulhi1, One);
----------------
pengfei wrote:
> Missing here?
Thanks - there's probably more but I'll try to deal with all of the remaining cases in the targets that I've already touched (note: AMDGPU is a target that often only extracts the upper half so we have single EXTRACT_ELEMENT nodes).


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147264/new/

https://reviews.llvm.org/D147264