[PATCH] D145219: [X86][InstCombine] Add tests for simplifying pternlog intrinsics; NFC
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 31 02:00:19 PDT 2023
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM with a couple of minors
================
Comment at: llvm/test/CodeGen/X86/ternlog.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s
+
----------------
Maybe run another test with a version that does opt -O3 as well? Just in case phase ordering is messing us up?
================
Comment at: llvm/test/CodeGen/X86/ternlog.ll:2333
+ ret <8 x i32> %r
+}
+
----------------
Can you add a 512-bit version as well - we should hopefully see that use a predicate mask select move?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145219/new/
https://reviews.llvm.org/D145219
More information about the llvm-commits
mailing list