[PATCH] D147306: [InterleaveAccess] Check that binop shuffles have an undef second operand

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, spatel, HazyFish, Peter.
Herald added subscribers: StephenFan, hiraditya.
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It is expected that shuffles that we hoist through binops only have a single vector operand, the other being undef/poison. The checks for isDeInterleaveMaskOfFactor check that all the elements come from inside the first vector, but with non-canonical shuffles the second operand could still have a value. Add a quick check to make sure it is UndefValue as expected, to make sure we don't run into problems with BinOpShuffles not being BinOps.

Fixes #61749


https://reviews.llvm.org/D147306

Files:
  llvm/lib/CodeGen/InterleavedAccessPass.cpp
  llvm/test/Transforms/InterleavedAccess/AArch64/binopshuffles.ll


Index: llvm/test/Transforms/InterleavedAccess/AArch64/binopshuffles.ll
===================================================================
--- llvm/test/Transforms/InterleavedAccess/AArch64/binopshuffles.ll
+++ llvm/test/Transforms/InterleavedAccess/AArch64/binopshuffles.ll
@@ -142,3 +142,41 @@
   %l8 = fadd fast <4 x float> %l6, %l5
   ret <4 x float> %l8
 }
+
+define void @noncanonical(ptr %p0, ptr %p1, ptr %p2) {
+; CHECK-LABEL: @noncanonical(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[V0:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 8
+; CHECK-NEXT:    [[V1:%.*]] = add <8 x i8> [[V0]], <i8 0, i8 1, i8 2, i8 3, i8 7, i8 7, i8 7, i8 7>
+; CHECK-NEXT:    [[V2:%.*]] = load <8 x i8>, ptr [[P1:%.*]], align 8
+; CHECK-NEXT:    [[SHUFFLED:%.*]] = shufflevector <8 x i8> [[V2]], <8 x i8> [[V1]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+; CHECK-NEXT:    store <4 x i8> [[SHUFFLED]], ptr [[P2:%.*]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %v0 = load <8 x i8>, ptr %p0
+  %v1 = add <8 x i8> %v0, <i8 0, i8 1, i8 2, i8 3, i8 7, i8 7, i8 7, i8 7>
+  %v2 = load <8 x i8>, ptr %p1
+  %shuffled = shufflevector <8 x i8> %v2, <8 x i8> %v1, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+  store <4 x i8> %shuffled, ptr %p2
+  ret void
+}
+
+define void @noncanonical_extmask(ptr %p0, ptr %p1, ptr %p2) {
+; CHECK-LABEL: @noncanonical_extmask(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[V0:%.*]] = load <8 x i8>, ptr [[P0:%.*]], align 8
+; CHECK-NEXT:    [[V1:%.*]] = add <8 x i8> [[V0]], <i8 0, i8 1, i8 2, i8 3, i8 7, i8 7, i8 7, i8 7>
+; CHECK-NEXT:    [[V2:%.*]] = load <8 x i8>, ptr [[P1:%.*]], align 8
+; CHECK-NEXT:    [[SHUFFLED:%.*]] = shufflevector <8 x i8> [[V2]], <8 x i8> [[V1]], <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+; CHECK-NEXT:    store <8 x i8> [[SHUFFLED]], ptr [[P2:%.*]], align 8
+; CHECK-NEXT:    ret void
+;
+entry:
+  %v0 = load <8 x i8>, ptr %p0
+  %v1 = add <8 x i8> %v0, <i8 0, i8 1, i8 2, i8 3, i8 7, i8 7, i8 7, i8 7>
+  %v2 = load <8 x i8>, ptr %p1
+  %shuffled = shufflevector <8 x i8> %v2, <8 x i8> %v1, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
+  store <8 x i8> %shuffled, ptr %p2
+  ret void
+}
Index: llvm/lib/CodeGen/InterleavedAccessPass.cpp
===================================================================
--- llvm/lib/CodeGen/InterleavedAccessPass.cpp
+++ llvm/lib/CodeGen/InterleavedAccessPass.cpp
@@ -240,8 +240,10 @@
       continue;
     }
     if (auto *BI = dyn_cast<BinaryOperator>(User)) {
-      if (all_of(BI->users(),
-                 [](auto *U) { return isa<ShuffleVectorInst>(U); })) {
+      if (all_of(BI->users(), [](auto *U) {
+            auto *SVI = dyn_cast<ShuffleVectorInst>(U);
+            return SVI && isa<UndefValue>(SVI->getOperand(1));
+          })) {
         for (auto *SVI : BI->users())
           BinOpShuffles.insert(cast<ShuffleVectorInst>(SVI));
         continue;


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