[PATCH] D147183: [RISCV][docs] Document which revision of the specification we implement
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 30 13:39:18 PDT 2023
asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.
LGTM, though hopefully at least one other person can confirm they're happy with the wording.
One point we clarified on the call is that the first bulletpoint under "The current known variances from the specification are:" is documenting what we do today, and the expectation is this is updated if it changes as part of moving to I 2.1 - we didn't discuss that particular point in depth. Of course anything here can be modified if we change our minds, but we did spend a bit of time discussing the second bullet (checking CSR names) and seemed to have no appetite for revisiting this in the near term. No change to the patch needed/suggested, just noting this for posterity.
================
Comment at: llvm/docs/RISCVUsage.rst:35
+* Unconditionally allowing instructions from zifencei, zicsr, zicntr, and
+ zihpm without gating them on the extensions being enabled. Previous
+ revisions of the specification included these instructions in the base
----------------
Nit: should probably drop zihpm from this listing as it only contains CSRs and no new instructions/pseudoinstructions.
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https://reviews.llvm.org/D147183/new/
https://reviews.llvm.org/D147183
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