[PATCH] D147243: [X86] MatchVectorAllZeroTest - add support for icmp(bitcast(icmp_ne(X,Y)),0) vector reduction patterns

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:24429
+                                  SelectionDAG &DAG, X86::CondCode &X86CC) {
+  SDValue Z = DAG.getConstant(0, DL, V.getValueType());
+  return LowerVectorAllEqual(DL, V, Z, CC, Mask, Subtarget, DAG, X86CC);
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Is there an issue creating a node that may potentially unused?


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:24503
+  // TODO: Expand to icmp(bitcast(icmp_eq(X,Y)),-1) patterns.
+  if (Op.getOpcode() == ISD::BITCAST && Mask.isAllOnes()) {
+    SDValue Src = Op.getOperand(0);
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Maybe just `PeekThroughBitCast(Op).getOpcode() == ISD::SETCC`?


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:24509
+      ISD::CondCode SrcCC = cast<CondCodeSDNode>(Src.getOperand(2))->get();
+      if (SrcCC == ISD::SETNE) {
+        SDValue LHS = Src.getOperand(0);
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Shouldnt there be a `Src.getOperand(1).isZeroConstant()`?


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Comment at: llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll:1031
+; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [15,15,15,15]
+; AVX2-NEXT:    vptest %xmm1, %xmm0
 ; AVX2-NEXT:    sete %al
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why doesn't this micro-fuse anymore? Likewise below.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147243/new/

https://reviews.llvm.org/D147243