[llvm] b0c8922 - [X86] LowerVectorAllZero - use MOVMSKPS for comparisons coming from vXi32/vXi64 vectors
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 30 04:47:39 PDT 2023
Author: Simon Pilgrim
Date: 2023-03-30T12:47:27+01:00
New Revision: b0c892296b830eece7edd213ddddfc396ffcc8a9
URL: https://github.com/llvm/llvm-project/commit/b0c892296b830eece7edd213ddddfc396ffcc8a9
DIFF: https://github.com/llvm/llvm-project/commit/b0c892296b830eece7edd213ddddfc396ffcc8a9.diff
LOG: [X86] LowerVectorAllZero - use MOVMSKPS for comparisons coming from vXi32/vXi64 vectors
Reduces size of all/anyof comparison mask and is more likely to further fold with source vectors.
MOVMSKPD is trickier to match as if we had the CMPEQQ instruction we'd be using the PTEST path
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/pr45378.ll
llvm/test/CodeGen/X86/ptest.ll
llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2a8a7d14aca8..dcbe9b9a8a21 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24405,10 +24405,11 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
return DAG.getNode(X86ISD::PTEST, DL, MVT::i32, V, V);
}
- V = DAG.getBitcast(MVT::v16i8, MaskBits(V));
- V = DAG.getNode(X86ISD::PCMPEQ, DL, MVT::v16i8, V,
- getZeroVector(MVT::v16i8, Subtarget, DAG, DL));
- V = DAG.getNOT(DL, V, MVT::v16i8);
+ MVT MaskVT = ScalarSize >= 32 ? MVT::v4i32 : MVT::v16i8;
+ V = DAG.getBitcast(MaskVT, MaskBits(V));
+ V = DAG.getNode(X86ISD::PCMPEQ, DL, MaskVT, V,
+ getZeroVector(MaskVT, Subtarget, DAG, DL));
+ V = DAG.getNOT(DL, V, MaskVT);
V = DAG.getNode(X86ISD::MOVMSK, DL, MVT::i32, V);
return DAG.getNode(X86ISD::CMP, DL, MVT::i32, V,
DAG.getConstant(0, DL, MVT::i32));
diff --git a/llvm/test/CodeGen/X86/pr45378.ll b/llvm/test/CodeGen/X86/pr45378.ll
index aa870b7afbd3..426f4eed662a 100644
--- a/llvm/test/CodeGen/X86/pr45378.ll
+++ b/llvm/test/CodeGen/X86/pr45378.ll
@@ -13,9 +13,9 @@ define i1 @parseHeaders(ptr %ptr) nounwind {
; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rdi), %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -43,9 +43,9 @@ define i1 @parseHeaders2_scalar_or(ptr %ptr) nounwind {
; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rdi), %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/ptest.ll b/llvm/test/CodeGen/X86/ptest.ll
index 5983d502af3d..d3da7524eaf1 100644
--- a/llvm/test/CodeGen/X86/ptest.ll
+++ b/llvm/test/CodeGen/X86/ptest.ll
@@ -8,9 +8,9 @@ define i32 @veccond128(<4 x i32> %input) {
; SSE2-LABEL: veccond128:
; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: je .LBB0_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -55,9 +55,9 @@ define i32 @veccond256(<8 x i32> %input) {
; SSE2: # %bb.0: # %entry
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: je .LBB1_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -107,9 +107,9 @@ define i32 @veccond512(<16 x i32> %input) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: je .LBB2_2
; SSE2-NEXT: # %bb.1: # %if-true-block
; SSE2-NEXT: xorl %eax, %eax
@@ -173,10 +173,10 @@ define i32 @vectest128(<4 x i32> %input) {
; SSE2-LABEL: vectest128:
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -204,10 +204,10 @@ define i32 @vectest256(<8 x i32> %input) {
; SSE2: # %bb.0:
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -239,10 +239,10 @@ define i32 @vectest512(<16 x i32> %input) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
; SSE2-NEXT: xorl %eax, %eax
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -284,9 +284,9 @@ define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {
; SSE2: # %bb.0:
; SSE2-NEXT: movl %edi, %eax
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
@@ -315,9 +315,9 @@ define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {
; SSE2-NEXT: movl %edi, %eax
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
@@ -350,9 +350,9 @@ define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %ecx
-; SSE2-NEXT: xorl $65535, %ecx # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %ecx
+; SSE2-NEXT: xorl $15, %ecx
; SSE2-NEXT: cmovel %esi, %eax
; SSE2-NEXT: retq
;
diff --git a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
index caa200c99984..0fa8ba45036d 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
@@ -14,9 +14,9 @@ define i1 @test_v2i64(<2 x i64> %a0) {
; SSE2-LABEL: test_v2i64:
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -41,9 +41,9 @@ define i1 @test_v4i64(<4 x i64> %a0) {
; SSE2: # %bb.0:
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -72,9 +72,9 @@ define i1 @test_v8i64(<8 x i64> %a0) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -126,9 +126,9 @@ define i1 @test_v16i64(<16 x i64> %a0) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -205,9 +205,9 @@ define i1 @test_v4i32(<4 x i32> %a0) {
; SSE2-LABEL: test_v4i32:
; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -232,9 +232,9 @@ define i1 @test_v8i32(<8 x i32> %a0) {
; SSE2: # %bb.0:
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -263,9 +263,9 @@ define i1 @test_v16i32(<16 x i32> %a0) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: setne %al
; SSE2-NEXT: retq
;
@@ -317,9 +317,9 @@ define i1 @test_v32i32(<32 x i32> %a0) {
; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -861,9 +861,9 @@ define i1 @trunc_v2i64(<2 x i64> %a0) {
define i1 @mask_v8i32(<8 x i32> %a0) {
; SSE2-LABEL: mask_v8i32:
; SSE2: # %bb.0:
-; SSE2-NEXT: por %xmm1, %xmm0
-; SSE2-NEXT: pmovmskb %xmm0, %eax
-; SSE2-NEXT: testl $34952, %eax # imm = 0x8888
+; SSE2-NEXT: orps %xmm1, %xmm0
+; SSE2-NEXT: movmskps %xmm0, %eax
+; SSE2-NEXT: testl %eax, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
@@ -1020,9 +1020,9 @@ define zeroext i1 @PR44781(ptr %0) {
; SSE2-NEXT: movdqu (%rdi), %xmm0
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; SSE2-NEXT: pxor %xmm1, %xmm1
-; SSE2-NEXT: pcmpeqb %xmm0, %xmm1
-; SSE2-NEXT: pmovmskb %xmm1, %eax
-; SSE2-NEXT: xorl $65535, %eax # imm = 0xFFFF
+; SSE2-NEXT: pcmpeqd %xmm0, %xmm1
+; SSE2-NEXT: movmskps %xmm1, %eax
+; SSE2-NEXT: xorl $15, %eax
; SSE2-NEXT: sete %al
; SSE2-NEXT: retq
;
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