[PATCH] D146198: [RISCV] Make Latency/ResourceCycles relevant to LMUL
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 30 04:09:20 PDT 2023
pcwang-thead updated this revision to Diff 509607.
pcwang-thead added a comment.
- Fix errors.
- Rename `index` to `IndexByLMUL`.
- Support `WorstCase`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146198/new/
https://reviews.llvm.org/D146198
Files:
llvm/lib/Target/RISCV/RISCVScheduleV.td
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