[llvm] 847b7f3 - [ARM] Use isNullConstant and isOneConstant (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 29 21:50:53 PDT 2023
Author: Kazu Hirata
Date: 2023-03-29T21:50:34-07:00
New Revision: 847b7f358b6facc7e7ab8c1261d8a65762acad02
URL: https://github.com/llvm/llvm-project/commit/847b7f358b6facc7e7ab8c1261d8a65762acad02
DIFF: https://github.com/llvm/llvm-project/commit/847b7f358b6facc7e7ab8c1261d8a65762acad02.diff
LOG: [ARM] Use isNullConstant and isOneConstant (NFC)
Added:
Modified:
llvm/lib/Target/ARM/ARMISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 9c5f0df4d9468..7500a869fb7c2 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -18238,19 +18238,13 @@ ARMTargetLowering::PerformBRCONDCombine(SDNode *N, SelectionDAG &DAG) const {
// -> (brcond Chain BB CC CPSR Cmp)
if (CC == ARMCC::NE && LHS.getOpcode() == ISD::AND && LHS->hasOneUse() &&
LHS->getOperand(0)->getOpcode() == ARMISD::CMOV &&
- LHS->getOperand(0)->hasOneUse()) {
- auto *LHS00C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(0));
- auto *LHS01C = dyn_cast<ConstantSDNode>(LHS->getOperand(0)->getOperand(1));
- auto *LHS1C = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
- auto *RHSC = dyn_cast<ConstantSDNode>(RHS);
- if ((LHS00C && LHS00C->getZExtValue() == 0) &&
- (LHS01C && LHS01C->getZExtValue() == 1) &&
- (LHS1C && LHS1C->getZExtValue() == 1) &&
- (RHSC && RHSC->getZExtValue() == 0)) {
- return DAG.getNode(
- ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2),
- LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
- }
+ LHS->getOperand(0)->hasOneUse() &&
+ isNullConstant(LHS->getOperand(0)->getOperand(0)) &&
+ isOneConstant(LHS->getOperand(0)->getOperand(1)) &&
+ isOneConstant(LHS->getOperand(1)) && isNullConstant(RHS)) {
+ return DAG.getNode(
+ ARMISD::BRCOND, dl, VT, Chain, BB, LHS->getOperand(0)->getOperand(2),
+ LHS->getOperand(0)->getOperand(3), LHS->getOperand(0)->getOperand(4));
}
return SDValue();
@@ -18311,17 +18305,12 @@ ARMTargetLowering::PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const {
// (cmov F T ne CPSR (cmpz (cmov 0 1 CC CPSR Cmp) 0))
// -> (cmov F T CC CPSR Cmp)
- if (CC == ARMCC::NE && LHS.getOpcode() == ARMISD::CMOV && LHS->hasOneUse()) {
- auto *LHS0C = dyn_cast<ConstantSDNode>(LHS->getOperand(0));
- auto *LHS1C = dyn_cast<ConstantSDNode>(LHS->getOperand(1));
- auto *RHSC = dyn_cast<ConstantSDNode>(RHS);
- if ((LHS0C && LHS0C->getZExtValue() == 0) &&
- (LHS1C && LHS1C->getZExtValue() == 1) &&
- (RHSC && RHSC->getZExtValue() == 0)) {
- return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal,
- LHS->getOperand(2), LHS->getOperand(3),
- LHS->getOperand(4));
- }
+ if (CC == ARMCC::NE && LHS.getOpcode() == ARMISD::CMOV && LHS->hasOneUse() &&
+ isNullConstant(LHS->getOperand(0)) && isOneConstant(LHS->getOperand(1)) &&
+ isNullConstant(RHS)) {
+ return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal,
+ LHS->getOperand(2), LHS->getOperand(3),
+ LHS->getOperand(4));
}
if (!VT.isInteger())
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