[PATCH] D147158: [AMDGPU] Do not reserve 16-bit registers
Joe Nash via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 29 13:07:46 PDT 2023
Joe_Nash added a comment.
In D147158#4231787 <https://reviews.llvm.org/D147158#4231787>, @rampitec wrote:
> In D147158#4231755 <https://reviews.llvm.org/D147158#4231755>, @Joe_Nash wrote:
>
>> In D147158#4231480 <https://reviews.llvm.org/D147158#4231480>, @rampitec wrote:
>>
>>> I am not so sure about SGPRs. I believe it is legal to use SGPR halves.
>>
>> It appears that this patch does not change anything about the legality of allocating registers in class SGPR_LO16.
>
> But if we will allow SGPRs this code will be needed on older targets again.
I think you are right about that. Perhaps that is a a good reason not to merge this patch unless there is some immediate benefit.
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https://reviews.llvm.org/D147158/new/
https://reviews.llvm.org/D147158
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