[PATCH] D133103: [PowerPC] Improve kill flag computation and add verification after MI peephole

[Stefan Pintilie via Phabricator via llvm-commits]

stefanp added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:1144
       case PPC::RLDICR: {
-        Simplified |= emitRLDICWhenLoweringJumpTables(MI) ||
+        Simplified |= emitRLDICWhenLoweringJumpTables(MI, ToErase) ||
                       combineSEXTAndSHL(MI, ToErase);
----------------
stefanp wrote:
> nit:
> Adding `ToErase` here is a good idea but maybe it should be a separate cleanup patch.
> I don't think it has anything to do with the kill flag computation.
Nope. I was wrong. You do need to add this here as part of this patch.
Please disregard my previous comment. 


================
Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:1159
+        if (Simplified) {
+          addRegToUpdate(RegsToUpdate, OrigOp1Reg);
+          if (MI.getOperand(1).isReg())
----------------
Note:
Checked that what would happen if we ended up with `OrigOp1Reg == PPC::NoRegister` here and it should be fine.

`Register::isVirtualRegister(PPC::NoRegister)` returns false and so we cannot add `PPC::NoRegister` to the list.


================
Comment at: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp:1876
   ++NumEXTSWAndSLDICombined;
+
   ToErase = &MI;
----------------
nit: Whitespace


================
Comment at: llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp:19
 #include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
----------------
nit:
Unrelated cleanup.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D133103/new/

https://reviews.llvm.org/D133103