[PATCH] D147158: [AMDGPU] Do not reserve 16-bit registers

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 29 07:27:25 PDT 2023


foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:613
-    Register Low = getSubReg(Reg, AMDGPU::lo16);
-    // This is to prevent BB vcc liveness errors.
-    if (!AMDGPU::SGPR_LO16RegClass.contains(Low))
----------------
I assume this comment refers to a vcc liveness error in `test/CodeGen/AMDGPU/frame-index-elimination.ll`. I have fixed that in a different way with D147157.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147158/new/

https://reviews.llvm.org/D147158



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