[PATCH] D140381: [PowerPC] Use Power9 test data class instruction to lower IS_FPCLASS
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 29 02:04:27 PDT 2023
shchenz accepted this revision as: shchenz.
shchenz added a comment.
Looks reasonable to me too. Thanks for making this improvement.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11010
+ SelectionDAG &DAG,
+ const PPCSubtarget &Subtarget) {
+ assert(Mask <= fcAllFlags && "Invalid fp_class flags!");
----------------
qiucf wrote:
> shchenz wrote:
> > Should we check `isKnownNeverNaN()` or `isKnownNeverZeroFloat()` first before we really compute the class? (we may need to add `isKnownNeverInfinity()` and `isKnownNeverSubnormal()`). With these functions, we can handle some compile-time class. For example, the `Op` is a fp constant.
> I think they were already handled in constant folding/earlycse before ISel. Following code still produces folded result after this patch on pwr9:
>
> ```
> define zeroext i1 @fpclass() {
> entry:
> %x = call i1 @llvm.is.fpclass.f64(double 0.0, i32 64)
> ret i1 %x
> }
> declare i1 @llvm.is.fpclass.f64(double, i32)
> ```
>
> SystemZ implementation does also not include constant folding.
OK. Let's improve this later if we find a pattern that is created during ISEL. I agree if the pattern is created before, we should handle it in inst combine phase.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D140381/new/
https://reviews.llvm.org/D140381
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