[PATCH] D147060: [MachineSink] Fix an assertion failure in isCycleInvariant
antoine moynault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 28 09:36:36 PDT 2023
antmo created this revision.
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Fix for #61766. Avoid asserting on dbg_value instr
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D147060
Files:
llvm/lib/CodeGen/MachineCycleAnalysis.cpp
llvm/test/CodeGen/Generic/sink-insts-to-avoid-spills-debug-crash.ll
Index: llvm/test/CodeGen/Generic/sink-insts-to-avoid-spills-debug-crash.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/Generic/sink-insts-to-avoid-spills-debug-crash.ll
@@ -0,0 +1,29 @@
+; RUN: llc -O2 -sink-insts-to-avoid-spills < %s | FileCheck %s
+; REQUIRES: aarch64-registered-target
+
+target triple = "aarch64-unknown-linux-gnu"
+
+; CHECK-LABEL: a:
+define i32 @a() {
+entry:
+ %call = tail call i32 @c()
+ call void @llvm.dbg.value(metadata i32 %call, metadata !3, metadata !DIExpression()), !dbg !8
+ br label %for.cond
+
+for.cond: ; preds = %for.cond, %entry
+ br label %for.cond
+}
+
+declare i32 @c()
+declare void @llvm.dbg.value(metadata, metadata, metadata)
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!2}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C11, file: !1)
+!1 = !DIFile(filename: "bcm.c", directory: "/")
+!2 = !{i32 2, !"Debug Info Version", i32 3}
+!3 = !DILocalVariable(name: "b", scope: !4, file: !1, line: 8, type: !7)
+!4 = distinct !DISubprogram(name: "a", scope: !1, unit: !0)
+!7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!8 = !DILocation(line: 0, scope: !4)
Index: llvm/lib/CodeGen/MachineCycleAnalysis.cpp
===================================================================
--- llvm/lib/CodeGen/MachineCycleAnalysis.cpp
+++ llvm/lib/CodeGen/MachineCycleAnalysis.cpp
@@ -98,6 +98,10 @@
const TargetRegisterInfo *TRI = ST.getRegisterInfo();
const TargetInstrInfo *TII = ST.getInstrInfo();
+ // DebugInstr cannot be moved, mark them as not invariant
+ if (I.isDebugInstr())
+ return false;
+
// The instruction is cycle invariant if all of its operands are.
for (const MachineOperand &MO : I.operands()) {
if (!MO.isReg())
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