[llvm] db7cb35 - [AArch64] Add v8.9a/v9.4a FEAT_ATS1A

[Archibald Elliott via llvm-commits]

Author: Archibald Elliott
Date: 2023-03-28T16:59:47+01:00
New Revision: db7cb353403357d788f780e362703a81d0fbf546

URL: https://github.com/llvm/llvm-project/commit/db7cb353403357d788f780e362703a81d0fbf546
DIFF: https://github.com/llvm/llvm-project/commit/db7cb353403357d788f780e362703a81d0fbf546.diff

LOG: [AArch64] Add v8.9a/v9.4a FEAT_ATS1A

FEAT_ATS1A adds three new AT system instruction aliases. This feature is
optional from v8.9a/v9.4a. FEAT_ATS1A is a very late addition to the
2022 A-profile VMSA extension, and has not yet been added to the public
docs available on developer.arm.com

These AT instructions are added without a command-line flag or feature,
because it is system-instruction only, and FEAT_S1PIE also has no
command-line flag.

Differential Revision: https://reviews.llvm.org/D146962

Added: 
    llvm/test/MC/AArch64/armv8.9a-ats1a.s
    llvm/test/MC/Disassembler/AArch64/armv8.9a-ats1a.txt

Modified: 
    llvm/lib/Target/AArch64/AArch64SystemOperands.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index cbe02f4e15b9a..3e7d4d81b242a 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -73,6 +73,11 @@ def : AT<"S1E1RP", 0b000, 0b0111, 0b1001, 0b000>;
 def : AT<"S1E1WP", 0b000, 0b0111, 0b1001, 0b001>;
 }
 
+// v8.9a/v9.4a FEAT_ATS1A
+def : AT<"S1E1A", 0b000, 0b0111, 0b1001, 0b010>;
+def : AT<"S1E2A", 0b100, 0b0111, 0b1001, 0b010>;
+def : AT<"S1E3A", 0b110, 0b0111, 0b1001, 0b010>;
+
 //===----------------------------------------------------------------------===//
 // DMB/DSB (data barrier) instruction options.
 //===----------------------------------------------------------------------===//

diff  --git a/llvm/test/MC/AArch64/armv8.9a-ats1a.s b/llvm/test/MC/AArch64/armv8.9a-ats1a.s
new file mode 100644
index 0000000000000..a30d206639425
--- /dev/null
+++ b/llvm/test/MC/AArch64/armv8.9a-ats1a.s
@@ -0,0 +1,10 @@
+// RUN: llvm-mc -triple aarch64 -show-encoding %s | FileCheck %s
+
+at s1e1a, x1
+// CHECK: at s1e1a, x1                        // encoding: [0x41,0x79,0x08,0xd5]
+
+at s1e2a, x1
+// CHECK: at s1e2a, x1                        // encoding: [0x41,0x79,0x0c,0xd5]
+
+at s1e3a, x1
+// CHECK: at s1e3a, x1                        // encoding: [0x41,0x79,0x0e,0xd5]

diff  --git a/llvm/test/MC/Disassembler/AArch64/armv8.9a-ats1a.txt b/llvm/test/MC/Disassembler/AArch64/armv8.9a-ats1a.txt
new file mode 100644
index 0000000000000..03aca5e916db0
--- /dev/null
+++ b/llvm/test/MC/Disassembler/AArch64/armv8.9a-ats1a.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple=aarch64 -disassemble %s | FileCheck %s
+
+[0x41,0x79,0x08,0xd5]
+# CHECK: at s1e1a, x1
+
+[0x41,0x79,0x0c,0xd5]
+# CHECK: at s1e2a, x1
+
+[0x41,0x79,0x0e,0xd5]
+# CHECK: at s1e3a, x1