[PATCH] D145614: [AARCH64] Enable STORE of v4i8 to help more vectorization opportunities

[Dave Green via Phabricator via llvm-commits]

dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.

Thanks. LGTM

> What is t/b instructions?

They are top/bottom instructions. They can do things like trunc and insert into the bottom half of each lane, to extend the top half into a full lane.



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Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h:402
+    // We can vectorize store v4i8.
+    if (ScalarMemTy->isIntegerTy(8) && isPowerOf2_32(VF) && VF >=4)
+      return 4;
----------------
Slight formatting on the `VF >=4` -> `VF >= 4`, but maybe just use `VF == 4` as I believe all other power2 sizes will already be handled?


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https://reviews.llvm.org/D145614