[PATCH] D142656: [SVE][codegen] Add pattern for SVE multiply-add accumulate

[Sushant Gokhale via Phabricator via llvm-commits]

sushgokh updated this revision to Diff 508900.
sushgokh added a comment.

Currently, depending upon whether the add/sub instruction can synthesize immediate directly,  its decided whether to generate add/sub+immediate  or  mov+mla/mad/msb/mls ops.

If the add/sub can synthesize immediate directly, then fused ops wont get generated. This patch tries to address this by having makeshift higher priority for the fused ops.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D142656/new/

https://reviews.llvm.org/D142656

Files:
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-int-arith.ll

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