[PATCH] D146437: [RISCV] Remove isCall instruction flag from JAL/JALR
Job Noorman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 27 07:14:14 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1d1b3c49531b: [RISCV] Remove isCall instruction flag from JAL/JALR (authored by jobnoorman).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146437/new/
https://reviews.llvm.org/D146437
Files:
llvm/lib/Target/RISCV/RISCVInstrInfo.td
Index: llvm/lib/Target/RISCV/RISCVInstrInfo.td
===================================================================
--- llvm/lib/Target/RISCV/RISCVInstrInfo.td
+++ llvm/lib/Target/RISCV/RISCVInstrInfo.td
@@ -620,11 +620,9 @@
def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
"auipc", "$rd, $imm20">, Sched<[WriteIALU]>;
-let isCall = 1 in
def JAL : RVInstJ<OPC_JAL, (outs GPR:$rd), (ins simm21_lsb0_jal:$imm20),
"jal", "$rd, $imm20">, Sched<[WriteJal]>;
-let isCall = 1 in
def JALR : RVInstI<0b000, OPC_JALR, (outs GPR:$rd),
(ins GPR:$rs1, simm12:$imm12),
"jalr", "$rd, ${imm12}(${rs1})">,
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