[PATCH] D145583: [AArch64][SME] Fix an infinite loop in DAGCombine related to adding -force-streaming-compatible-sve flag.

Mon Mar 27 06:24:29 PDT 2023

dtemirbulatov added inline comments.

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Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll:911
+; CHECK-NEXT:    ret
+  %broadcast.splatinsert2 = insertelement <8 x i32> poison, i32 %0, i64 0
+  %broadcast.splat3 = shufflevector <8 x i32> %broadcast.splatinsert2, <8 x i32> zeroinitializer, <8 x i32> zeroinitializer
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dtemirbulatov wrote:
> sdesmalen wrote:
> > nit: If you replace the `8` here by a smaller number like `2`, then we don't need to observe the effect of legalisation and we'd only get `1` mul instead of `4`.
> I could not reproduce the issue with <2 x > type.
sorry, I was wrong. I can reproduce with <2 x > types.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145583/new/

https://reviews.llvm.org/D145583