[PATCH] D145706: [MachineSink] Sink instruction copies when they can replace copy into hard register
Momchil Velikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 27 02:33:16 PDT 2023
chill updated this revision to Diff 508545.
chill added a comment.
Update: don't sink instructions with non-register operands which could affect register pressure.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145706/new/
https://reviews.llvm.org/D145706
Files:
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/lib/CodeGen/MachineSink.cpp
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/test/CodeGen/AArch64/copy-sink.ll
llvm/test/CodeGen/AArch64/loop-sink.mir
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D145706.508545.patch
Type: text/x-patch
Size: 28432 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230327/ebf65a80/attachment.bin>
More information about the llvm-commits
mailing list