[llvm] f5f752e - AMDGPU: Convert test to generated checks

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 26 06:34:37 PDT 2023


Author: Matt Arsenault
Date: 2023-03-26T09:34:29-04:00
New Revision: f5f752ebfdfe7224c508599bb33858acaee8a51f

URL: https://github.com/llvm/llvm-project/commit/f5f752ebfdfe7224c508599bb33858acaee8a51f
DIFF: https://github.com/llvm/llvm-project/commit/f5f752ebfdfe7224c508599bb33858acaee8a51f.diff

LOG: AMDGPU: Convert test to generated checks

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/splitkit.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/splitkit.mir b/llvm/test/CodeGen/AMDGPU/splitkit.mir
index 8f4de729388c9..dd3abf6007854 100644
--- a/llvm/test/CodeGen/AMDGPU/splitkit.mir
+++ b/llvm/test/CodeGen/AMDGPU/splitkit.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
 # RUN: llc -o - %s -mtriple=amdgcn-- -mcpu=fiji -verify-machineinstrs -run-pass=greedy,virtregrewriter | FileCheck %s
 --- |
   define amdgpu_kernel void @func0() #0 { ret void }
@@ -9,15 +10,19 @@
 ---
 # Make sure we only get a single spill+reload even if liverange splitting
 # created a sequence of multiple copy instructions.
-# CHECK-LABEL: name: func0
-# CHECK: SI_SPILL_S128_SAVE
-# CHECK-NOT: SI_SPILL_S128_SAVE
-# CHECK: S_NOP 0
-# CHECK: SI_SPILL_S128_RESTORE
-# CHECK-NOT: SI_SPILL_S128_RESTORE
 name: func0
 body: |
   bb.0:
+    ; CHECK-LABEL: name: func0
+    ; CHECK: S_NOP 0, implicit-def renamable $sgpr0
+    ; CHECK-NEXT: S_NOP 0, implicit-def renamable $sgpr3
+    ; CHECK-NEXT: SI_SPILL_S128_SAVE renamable $sgpr0_sgpr1_sgpr2_sgpr3, %stack.0, implicit $exec, implicit $sp_reg :: (store (s128) into %stack.0, align 4, addrspace 5)
+    ; CHECK-NEXT: S_NOP 0, implicit-def dead $sgpr0, implicit-def dead $sgpr1, implicit-def dead $sgpr2, implicit-def dead $sgpr3, implicit-def dead $sgpr4, implicit-def dead $sgpr5, implicit-def dead $sgpr6, implicit-def dead $sgpr7, implicit-def dead $sgpr8, implicit-def dead $sgpr9, implicit-def dead $sgpr10, implicit-def dead $sgpr11
+    ; CHECK-NEXT: renamable $sgpr0_sgpr1_sgpr2_sgpr3 = SI_SPILL_S128_RESTORE %stack.0, implicit $exec, implicit $sp_reg :: (load (s128) from %stack.0, align 4, addrspace 5)
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr0
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr3
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr0
+    ; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr3
     S_NOP 0, implicit-def undef %0.sub0 : sgpr_128
     S_NOP 0, implicit-def %0.sub3 : sgpr_128
 
@@ -33,22 +38,24 @@ body: |
 # LiveRange splitting should split this into 2 intervals with the second getting
 # allocated to sgpr0_sgpr1 and the first to something else so we see two copies
 # in between for the two subregisters that are alive.
-# CHECK-LABEL: name: func1
-# CHECK: [[REG0:\$sgpr[0-9]+]] = COPY $sgpr0
-# CHECK: [[REG1:\$sgpr[0-9]+]] = COPY $sgpr2
-# CHECK: S_NOP 0
-# CHECK: S_NOP 0, implicit renamable [[REG0]]
-# CHECK: S_NOP 0, implicit renamable [[REG1]]
-# CHECK: $sgpr0 = COPY killed renamable [[REG0]]
-# CHECK: $sgpr2 = COPY renamable [[REG1]]
-# CHECK: S_NOP
-# CHECK: S_NOP 0, implicit renamable $sgpr0
-# CHECK: S_NOP 0, implicit killed renamable $sgpr2
 name: func1
 tracksRegLiveness: true
 body: |
   bb.0:
     liveins: $sgpr0, $sgpr1, $sgpr2
+    ; CHECK-LABEL: name: func1
+    ; CHECK: liveins: $sgpr0, $sgpr1, $sgpr2
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: renamable $sgpr4 = COPY $sgpr0
+    ; CHECK-NEXT: renamable $sgpr6 = COPY $sgpr2
+    ; CHECK-NEXT: S_NOP 0, implicit-def dead $sgpr0, implicit-def dead $sgpr1
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr4
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr6
+    ; CHECK-NEXT: renamable $sgpr0 = COPY killed renamable $sgpr4
+    ; CHECK-NEXT: renamable $sgpr2 = COPY renamable $sgpr6
+    ; CHECK-NEXT: S_NOP 0, implicit-def dead $sgpr4, implicit-def dead $sgpr5, implicit-def dead $sgpr6, implicit-def dead $sgpr7, implicit-def dead $sgpr8, implicit-def dead $sgpr9, implicit-def dead $sgpr10, implicit-def dead $sgpr11, implicit-def dead $sgpr12, implicit-def dead $sgpr13, implicit-def dead $sgpr14, implicit-def dead $sgpr15, implicit-def dead $vcc_lo, implicit-def dead $vcc_hi
+    ; CHECK-NEXT: S_NOP 0, implicit renamable $sgpr0
+    ; CHECK-NEXT: S_NOP 0, implicit killed renamable $sgpr2
     undef %0.sub0 : sgpr_128 = COPY $sgpr0
     %0.sub2 = COPY $sgpr2
 
@@ -66,13 +73,44 @@ body: |
 ---
 # Check that copy hoisting out of loops works. This mainly should not crash the
 # compiler when it hoists a subreg copy sequence.
-# CHECK-LABEL: name: splitHoist
-# CHECK: S_NOP 0, implicit-def renamable $sgpr0
-# CHECK: S_NOP 0, implicit-def renamable $sgpr3
-# CHECK-NEXT: SI_SPILL_S128_SAVE
 name: splitHoist
 tracksRegLiveness: true
 body: |
+  ; CHECK-LABEL: name: splitHoist
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_NOP 0, implicit-def renamable $sgpr0
+  ; CHECK-NEXT:   S_NOP 0, implicit-def renamable $sgpr3
+  ; CHECK-NEXT:   SI_SPILL_S128_SAVE renamable $sgpr0_sgpr1_sgpr2_sgpr3, %stack.0, implicit $exec, implicit $sp_reg :: (store (s128) into %stack.0, align 4, addrspace 5)
+  ; CHECK-NEXT:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
+  ; CHECK-NEXT:   S_BRANCH %bb.2
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.3(0x40000000)
+  ; CHECK-NEXT:   liveins: $sgpr0_sgpr1_sgpr2_sgpr3:0x00000000000000C3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_NOP 0, implicit renamable $sgpr0
+  ; CHECK-NEXT:   S_NOP 0, implicit-def dead $sgpr0, implicit-def dead $sgpr1, implicit-def dead $sgpr2, implicit-def dead $sgpr3, implicit-def dead $sgpr4, implicit-def dead $sgpr5, implicit-def dead $sgpr6, implicit-def dead $sgpr7, implicit-def dead $sgpr8, implicit-def dead $sgpr9, implicit-def dead $sgpr10, implicit-def dead $sgpr11
+  ; CHECK-NEXT:   renamable $sgpr0_sgpr1_sgpr2_sgpr3 = SI_SPILL_S128_RESTORE %stack.0, implicit $exec, implicit $sp_reg :: (load (s128) from %stack.0, align 4, addrspace 5)
+  ; CHECK-NEXT:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
+  ; CHECK-NEXT:   S_BRANCH %bb.3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
+  ; CHECK-NEXT:   liveins: $sgpr0_sgpr1_sgpr2_sgpr3:0x00000000000000C3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_NOP 0, implicit-def dead $sgpr0, implicit-def dead $sgpr1, implicit-def dead $sgpr2, implicit-def dead $sgpr3, implicit-def dead $sgpr4, implicit-def dead $sgpr5, implicit-def dead $sgpr6, implicit-def dead $sgpr7, implicit-def dead $sgpr8, implicit-def dead $sgpr9, implicit-def dead $sgpr10, implicit-def dead $sgpr11
+  ; CHECK-NEXT:   renamable $sgpr0_sgpr1_sgpr2_sgpr3 = SI_SPILL_S128_RESTORE %stack.0, implicit $exec, implicit $sp_reg :: (load (s128) from %stack.0, align 4, addrspace 5)
+  ; CHECK-NEXT:   S_BRANCH %bb.3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3:
+  ; CHECK-NEXT:   liveins: $sgpr0_sgpr1_sgpr2_sgpr3:0x00000000000000C3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   S_NOP 0, implicit renamable $sgpr0
+  ; CHECK-NEXT:   S_NOP 0, implicit renamable $sgpr3
+  ; CHECK-NEXT:   S_NOP 0, implicit renamable $sgpr0
+  ; CHECK-NEXT:   S_NOP 0, implicit killed renamable $sgpr3
   bb.0:
     successors: %bb.1, %bb.2
     S_NOP 0, implicit-def undef %0.sub0 : sgpr_128


        


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