[PATCH] D146862: [X86] Fix the incorrect displacement for prolog/epilog
LuoYuanke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 24 19:03:13 PDT 2023
LuoYuanke created this revision.
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LuoYuanke requested review of this revision.
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The bug is introduced in rGe4ceb5a7bb9b <https://reviews.llvm.org/rGe4ceb5a7bb9b8f6d730530345649286370dd3ff8> which set the wrong offset from
the stack base. This patch is to fix the bug.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D146862
Files:
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/test/CodeGen/X86/i386-baseptr.ll
llvm/test/CodeGen/X86/x86-64-baseptr.ll
Index: llvm/test/CodeGen/X86/x86-64-baseptr.ll
===================================================================
--- llvm/test/CodeGen/X86/x86-64-baseptr.ll
+++ llvm/test/CodeGen/X86/x86-64-baseptr.ll
@@ -80,7 +80,7 @@
; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %r10
; CHECK-NEXT: .cfi_def_cfa %r10, 0
; CHECK-NEXT: andq $-128, %rsp
-; CHECK-NEXT: pushq -16(%r10)
+; CHECK-NEXT: pushq -8(%r10)
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: .cfi_escape 0x10, 0x06, 0x02, 0x76, 0x00 #
@@ -111,7 +111,7 @@
; CHECK-NEXT: leaq -8(%rbp), %rsp
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %rbp
-; CHECK-NEXT: leaq -16(%r10), %rsp
+; CHECK-NEXT: leaq -8(%r10), %rsp
; CHECK-NEXT: .cfi_def_cfa %rsp, 8
; CHECK-NEXT: retq
;
@@ -167,7 +167,7 @@
; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %r10
; CHECK-NEXT: .cfi_def_cfa %r10, 0
; CHECK-NEXT: andq $-128, %rsp
-; CHECK-NEXT: pushq -16(%r10)
+; CHECK-NEXT: pushq -8(%r10)
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: movq %rsp, %rbp
; CHECK-NEXT: .cfi_escape 0x10, 0x06, 0x02, 0x76, 0x00 #
@@ -226,7 +226,7 @@
; CHECK-NEXT: leaq -8(%rbp), %rsp
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: popq %rbp
-; CHECK-NEXT: leaq -16(%r10), %rsp
+; CHECK-NEXT: leaq -8(%r10), %rsp
; CHECK-NEXT: .cfi_def_cfa %rsp, 8
; CHECK-NEXT: retq
;
Index: llvm/test/CodeGen/X86/i386-baseptr.ll
===================================================================
--- llvm/test/CodeGen/X86/i386-baseptr.ll
+++ llvm/test/CodeGen/X86/i386-baseptr.ll
@@ -73,7 +73,7 @@
; CHECK-NEXT: leal -4(%ebp), %esp
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %ebp
-; CHECK-NEXT: leal -8(%ecx), %esp
+; CHECK-NEXT: leal -4(%ecx), %esp
; CHECK-NEXT: .cfi_def_cfa %esp, 4
; CHECK-NEXT: retl
entry:
Index: llvm/lib/Target/X86/X86FrameLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86FrameLowering.cpp
+++ llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -1587,7 +1587,7 @@
MachineInstr::FrameSetup);
}
BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
- int64_t Offset = Is64Bit ? -2 * (int64_t)SlotSize : -1 * (int64_t)SlotSize;
+ int64_t Offset = -1 * (int64_t)SlotSize;
BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64rmm: X86::PUSH32rmm))
.addReg(ArgBaseReg)
.addImm(1)
@@ -2318,13 +2318,13 @@
Opc = X86::LEA64r;
StackReg = X86::RSP;
}
- // leal -8(%basereg), %esp
+ // leal -4(%basereg), %esp
// .cfi_def_cfa %esp, 4
BuildMI(MBB, MBBI, DL, TII.get(Opc), StackReg)
.addUse(ArgBaseReg)
.addImm(1)
.addUse(X86::NoRegister)
- .addImm((int64_t)SlotSize * -2)
+ .addImm((int64_t)SlotSize * -1)
.addUse(X86::NoRegister)
.setMIFlag(MachineInstr::FrameDestroy);
if (NeedsDwarfCFI) {
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