[PATCH] D146787: [X86] Teach computeKnownBitsForTargetNode about MUL_IMM
Kazu Hirata via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 24 00:23:59 PDT 2023
kazu updated this revision to Diff 507979.
kazu added a comment.
Guard against a potential integer overflow.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D146787/new/
https://reviews.llvm.org/D146787
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/select-constant-lea.ll
Index: llvm/test/CodeGen/X86/select-constant-lea.ll
===================================================================
--- llvm/test/CodeGen/X86/select-constant-lea.ll
+++ llvm/test/CodeGen/X86/select-constant-lea.ll
@@ -8,8 +8,7 @@
; BASE-NEXT: xorl %eax, %eax
; BASE-NEXT: cmpl $10, %edi
; BASE-NEXT: setae %al
-; BASE-NEXT: leal (%rax,%rax,4), %eax
-; BASE-NEXT: orl $8, %eax
+; BASE-NEXT: leal 8(%rax,%rax,4), %eax
; BASE-NEXT: retq
;
; SLOWLEA3-LABEL: select_unsigned_lt_10_8_13j:
@@ -18,7 +17,7 @@
; SLOWLEA3-NEXT: cmpl $10, %edi
; SLOWLEA3-NEXT: setae %al
; SLOWLEA3-NEXT: leal (%rax,%rax,4), %eax
-; SLOWLEA3-NEXT: orl $8, %eax
+; SLOWLEA3-NEXT: addl $8, %eax
; SLOWLEA3-NEXT: retq
%2 = icmp ult i32 %0, 10
%3 = select i1 %2, i32 8, i32 13
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -38098,6 +38098,19 @@
Known.resetAll();
switch (Opc) {
default: break;
+ case X86ISD::MUL_IMM: {
+ KnownBits Known2 =
+ DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
+ const APInt &Imm = cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue();
+ APInt Val = Known2.Zero;
+ Val.flipAllBits();
+ // Compute the known zero bits if we don't have to worry about overflow.
+ if (Imm.getActiveBits() + Val.getActiveBits() <= BitWidth) {
+ Val *= Imm;
+ Known.Zero.setBitsFrom(Val.getActiveBits());
+ }
+ break;
+ }
case X86ISD::SETCC:
Known.Zero.setBitsFrom(1);
break;
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