[llvm] 1e4325f - [X86] Precommit a test

[Kazu Hirata via llvm-commits]

Author: Kazu Hirata
Date: 2023-03-23T23:48:17-07:00
New Revision: 1e4325f30c2494637626a978c54b41c8ca7ec0ff

URL: https://github.com/llvm/llvm-project/commit/1e4325f30c2494637626a978c54b41c8ca7ec0ff
DIFF: https://github.com/llvm/llvm-project/commit/1e4325f30c2494637626a978c54b41c8ca7ec0ff.diff

LOG: [X86] Precommit a test

This patch precommits a test for:

https://github.com/llvm/llvm-project/issues/61365

Added: 
    llvm/test/CodeGen/X86/select-constant-lea.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/select-constant-lea.ll b/llvm/test/CodeGen/X86/select-constant-lea.ll
new file mode 100644
index 000000000000..e8472053353c
--- /dev/null
+++ b/llvm/test/CodeGen/X86/select-constant-lea.ll
@@ -0,0 +1,26 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown                      | FileCheck %s --check-prefix=BASE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3
+
+define i32 @select_unsigned_lt_10_8_13j(i32 %0) {
+; BASE-LABEL: select_unsigned_lt_10_8_13j:
+; BASE:       # %bb.0:
+; BASE-NEXT:    xorl %eax, %eax
+; BASE-NEXT:    cmpl $10, %edi
+; BASE-NEXT:    setae %al
+; BASE-NEXT:    leal (%rax,%rax,4), %eax
+; BASE-NEXT:    orl $8, %eax
+; BASE-NEXT:    retq
+;
+; SLOWLEA3-LABEL: select_unsigned_lt_10_8_13j:
+; SLOWLEA3:       # %bb.0:
+; SLOWLEA3-NEXT:    xorl %eax, %eax
+; SLOWLEA3-NEXT:    cmpl $10, %edi
+; SLOWLEA3-NEXT:    setae %al
+; SLOWLEA3-NEXT:    leal (%rax,%rax,4), %eax
+; SLOWLEA3-NEXT:    orl $8, %eax
+; SLOWLEA3-NEXT:    retq
+  %2 = icmp ult i32 %0, 10
+  %3 = select i1 %2, i32 8, i32 13
+  ret i32 %3
+}