[llvm] cea9383 - [InstCombine] Try to recognize bswap pattern when calling funnel shifts
Jun Zhang via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 23 19:51:53 PDT 2023
Author: Jun Zhang
Date: 2023-03-24T10:51:36+08:00
New Revision: cea938390ea77d494b77d399ed440c0c76ef3849
URL: https://github.com/llvm/llvm-project/commit/cea938390ea77d494b77d399ed440c0c76ef3849
DIFF: https://github.com/llvm/llvm-project/commit/cea938390ea77d494b77d399ed440c0c76ef3849.diff
LOG: [InstCombine] Try to recognize bswap pattern when calling funnel shifts
Alive2: https://alive2.llvm.org/ce/z/dxxD7B
Fixes: https://github.com/llvm/llvm-project/issues/60690
Signed-off-by: Jun Zhang <jun at junz.org>
Differential Revision: https://reviews.llvm.org/D146637
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/bswap.ll
llvm/test/Transforms/InstCombine/fsh.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 0fbd62e8a41c..0708fb44b982 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -1795,6 +1795,10 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
Function *Bswap = Intrinsic::getDeclaration(Mod, Intrinsic::bswap, Ty);
return CallInst::Create(Bswap, { Op0 });
}
+ if (Instruction *BitOp =
+ matchBSwapOrBitReverse(*II, /*MatchBSwaps*/ true,
+ /*MatchBitReversals*/ true))
+ return BitOp;
}
// Left or right might be masked.
diff --git a/llvm/test/Transforms/InstCombine/bswap.ll b/llvm/test/Transforms/InstCombine/bswap.ll
index ba68e18cf799..bb70b4e0c1be 100644
--- a/llvm/test/Transforms/InstCombine/bswap.ll
+++ b/llvm/test/Transforms/InstCombine/bswap.ll
@@ -932,17 +932,7 @@ define i32 @PR50910(i64 %t0) {
define i64 @PR60690_call_fshl(i64 %result) {
; CHECK-LABEL: @PR60690_call_fshl(
-; CHECK-NEXT: [[AND_I:%.*]] = lshr i64 [[RESULT:%.*]], 8
-; CHECK-NEXT: [[SHR_I:%.*]] = and i64 [[AND_I]], 71777214294589695
-; CHECK-NEXT: [[AND1_I:%.*]] = shl i64 [[RESULT]], 8
-; CHECK-NEXT: [[SHL_I:%.*]] = and i64 [[AND1_I]], -71777214294589696
-; CHECK-NEXT: [[OR_I:%.*]] = or i64 [[SHR_I]], [[SHL_I]]
-; CHECK-NEXT: [[AND_I7:%.*]] = shl i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHL_I8:%.*]] = and i64 [[AND_I7]], -281470681808896
-; CHECK-NEXT: [[AND1_I9:%.*]] = lshr i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHR_I10:%.*]] = and i64 [[AND1_I9]], 281470681808895
-; CHECK-NEXT: [[OR_I11:%.*]] = or i64 [[SHL_I8]], [[SHR_I10]]
-; CHECK-NEXT: [[OR_I12:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[OR_I11]], i64 [[OR_I11]], i64 32)
+; CHECK-NEXT: [[OR_I12:%.*]] = call i64 @llvm.bswap.i64(i64 [[RESULT:%.*]])
; CHECK-NEXT: ret i64 [[OR_I12]]
;
%and.i = lshr i64 %result, 8
@@ -962,17 +952,7 @@ declare i64 @llvm.fshl.i64(i64, i64, i64)
define i64 @PR60690_call_fshr(i64 %result) {
; CHECK-LABEL: @PR60690_call_fshr(
-; CHECK-NEXT: [[AND_I:%.*]] = lshr i64 [[RESULT:%.*]], 8
-; CHECK-NEXT: [[SHR_I:%.*]] = and i64 [[AND_I]], 71777214294589695
-; CHECK-NEXT: [[AND1_I:%.*]] = shl i64 [[RESULT]], 8
-; CHECK-NEXT: [[SHL_I:%.*]] = and i64 [[AND1_I]], -71777214294589696
-; CHECK-NEXT: [[OR_I:%.*]] = or i64 [[SHR_I]], [[SHL_I]]
-; CHECK-NEXT: [[AND_I7:%.*]] = shl i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHL_I8:%.*]] = and i64 [[AND_I7]], -281470681808896
-; CHECK-NEXT: [[AND1_I9:%.*]] = lshr i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHR_I10:%.*]] = and i64 [[AND1_I9]], 281470681808895
-; CHECK-NEXT: [[OR_I11:%.*]] = or i64 [[SHL_I8]], [[SHR_I10]]
-; CHECK-NEXT: [[OR_I12:%.*]] = call i64 @llvm.fshl.i64(i64 [[OR_I11]], i64 [[OR_I11]], i64 32)
+; CHECK-NEXT: [[OR_I12:%.*]] = call i64 @llvm.bswap.i64(i64 [[RESULT:%.*]])
; CHECK-NEXT: ret i64 [[OR_I12]]
;
%and.i = lshr i64 %result, 8
diff --git a/llvm/test/Transforms/InstCombine/fsh.ll b/llvm/test/Transforms/InstCombine/fsh.ll
index 7d3f3948511d..489f6e686680 100644
--- a/llvm/test/Transforms/InstCombine/fsh.ll
+++ b/llvm/test/Transforms/InstCombine/fsh.ll
@@ -672,8 +672,9 @@ define i32 @fshl_mask_args_same1(i32 %a) {
define i32 @fshl_mask_args_same2(i32 %a) {
; CHECK-LABEL: @fshl_mask_args_same2(
-; CHECK-NEXT: [[T1:%.*]] = shl i32 [[A:%.*]], 8
-; CHECK-NEXT: [[T2:%.*]] = and i32 [[T1]], 65280
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[A:%.*]] to i16
+; CHECK-NEXT: [[REV:%.*]] = shl i16 [[TRUNC]], 8
+; CHECK-NEXT: [[T2:%.*]] = zext i16 [[REV]] to i32
; CHECK-NEXT: ret i32 [[T2]]
;
%t1 = and i32 %a, 255
@@ -683,8 +684,8 @@ define i32 @fshl_mask_args_same2(i32 %a) {
define i32 @fshl_mask_args_same3(i32 %a) {
; CHECK-LABEL: @fshl_mask_args_same3(
-; CHECK-NEXT: [[T2:%.*]] = shl i32 [[A:%.*]], 24
-; CHECK-NEXT: ret i32 [[T2]]
+; CHECK-NEXT: [[REV:%.*]] = shl i32 [[A:%.*]], 24
+; CHECK-NEXT: ret i32 [[REV]]
;
%t1 = and i32 %a, 255
%t2 = call i32 @llvm.fshl.i32(i32 %t1, i32 %t1, i32 24)
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