[PATCH] D146774: [AMDGPU][IGLP] WIP/Demo: Add rules to SchedGroups

[Jeffrey Byrnes via Phabricator via llvm-commits]

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In its current state, this is meant to showcase an idea for discussion.

As desired mutations are trending towards groups of "patterns" of instructions, it makes sense to allow finer grain specification of SchedGroups. Previously, SchedGroups could only be defined in terms of the classes of Instructions allowed in the SchedGroup. This introduces the "rule" framework which allows for specifying SchedGroups based on a pattern all of the comprising instructions must follow.

Previously, we could somewhat express patterns by long SchedGroup pipelines, but this introduced challenging problems for the pipeline solver, and we still couldn't express things like "the second MFMA SchedGroup must have the second lowest SU # of all MFMAs". Rules should allow for greater expression of SchedGroups, while simultaneously reducing the number of SchedGroups an SU can map to, making things easier for PipelineSolver.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146774

Files:
  llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.s
  llvm/test/CodeGen/AMDGPU/myOuty

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