[PATCH] D146711: [RISCV] Lower shuffles as vmerge + vslide{up,down} where possible

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

I think you're going one step too far with this patch.  Not in the sense that this patch isn't justified - only in the sense you should do a simpler case first.

As highlighted in your test diffs, if you have a suffix of the result vector coming from the second source operand, you can do the operation with a single slideup.

I think you should match this case explicitly above the generic gather/select lowering.  Doing so simplifies the test deltas to only the cases where the select is actually needed.

The other option is to add a DAG combine which removes the select afterwards, but I think matching up front is probably the right answer here.



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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll:654
 ; CHECK-NEXT:    vmv.s.x v0, a0
-; CHECK-NEXT:    vadd.vi v8, v11, -4
-; CHECK-NEXT:    vrgather.vv v10, v9, v8, v0.t
-; CHECK-NEXT:    vmv1r.v v8, v10
+; CHECK-NEXT:    vslideup.vi v10, v9, 4
+; CHECK-NEXT:    vmerge.vvm v8, v10, v8, v0
----------------
This can be done with a single slide up.  You don't need the select here at all.  


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