[PATCH] D146701: [AMDGPU] Create Subtarget Features for some of 16 bits atomic fadd instructions

Thu Mar 23 06:13:16 PDT 2023

foad added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/BUFInstructions.td:2889

-defm BUFFER_ATOMIC_ADD_F32    : MUBUF_Real_Atomic_vi <0x4d>;
+let SubtargetPredicate = HasAtomicBufferGlobalPkAddF16NoRtnInsts in {
 defm BUFFER_ATOMIC_PK_ADD_F16 : MUBUF_Real_Atomic_vi <0x4e>;
----------------
mariusz-sikora-at-amd wrote:
> foad wrote:
> > Could remove the braces if you prefer - then you don't need the "End" comment either.
> So, as I understand from other comment:
> 
> > Generally Real instructions copy their predicates from the corresponding Pseudo, so this should not be required here. Please check the other places where you have added predicates to Real instructions too.
> 
> We do not need this (L2889) Predicate, because it was added to Pseudo Instruction ?
Correct. See the places commented "copy relevant pseudo op flags" in this file.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146701/new/

https://reviews.llvm.org/D146701