[llvm] 4738c5f - [X86] LowerVectorAllZero - early out for masked v2i64 cases without PTEST. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 23 06:08:51 PDT 2023
Author: Simon Pilgrim
Date: 2023-03-23T13:07:29Z
New Revision: 4738c5f0832f283f8822b7a5b8b8491a20425346
URL: https://github.com/llvm/llvm-project/commit/4738c5f0832f283f8822b7a5b8b8491a20425346
DIFF: https://github.com/llvm/llvm-project/commit/4738c5f0832f283f8822b7a5b8b8491a20425346.diff
LOG: [X86] LowerVectorAllZero - early out for masked v2i64 cases without PTEST. NFC.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e828fe4b9dd15..74e2a2b6fdc10 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24192,6 +24192,12 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
DAG.getConstant(0, DL, IntVT));
}
+ // Without PTEST, a masked v2i64 or-reduction is not faster than
+ // scalarization.
+ bool UsePTEST = Subtarget.hasSSE41();
+ if (!UsePTEST && !Mask.isAllOnes() && VT.getScalarSizeInBits() > 32)
+ return SDValue();
+
// Split down to 128/256-bit vector.
unsigned TestSize = Subtarget.hasAVX() ? 256 : 128;
while (VT.getSizeInBits() > TestSize) {
@@ -24200,18 +24206,12 @@ static SDValue LowerVectorAllZero(const SDLoc &DL, SDValue V, ISD::CondCode CC,
V = DAG.getNode(ISD::OR, DL, VT, Split.first, Split.second);
}
- bool UsePTEST = Subtarget.hasSSE41();
if (UsePTEST) {
MVT TestVT = VT.is128BitVector() ? MVT::v2i64 : MVT::v4i64;
V = DAG.getBitcast(TestVT, MaskBits(V));
return DAG.getNode(X86ISD::PTEST, DL, MVT::i32, V, V);
}
- // Without PTEST, a masked v2i64 or-reduction is not faster than
- // scalarization.
- if (!Mask.isAllOnes() && VT.getScalarSizeInBits() > 32)
- return SDValue();
-
V = DAG.getBitcast(MVT::v16i8, MaskBits(V));
V = DAG.getNode(X86ISD::PCMPEQ, DL, MVT::v16i8, V,
getZeroVector(MVT::v16i8, Subtarget, DAG, DL));
More information about the llvm-commits
mailing list