[PATCH] D146518: [AArch64] Extend icmp bitcast to vecreduce fold to comparison with -1

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

Sorry, I've not had much review time this week but I'll take a proper look tomorrow or Friday.



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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:20438
+                        LHS);
       return DAG.getSetCC(DL, VT, LHS, RHS, Cond);
     }
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nikic wrote:
> I found the formulation here is a bit roundabout -- is there a reason why we can't directly return the vecreduce result (together with a NOT, depending on predicate)?
It was just a case of not radically changing the DAG and meant not having to worry about `getBooleanContents()`.  Simplifying `setcc(ext(i1))` seems like a DAG combine independent of how the i1 is produced, which looking at the test output presumably already exists?


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https://reviews.llvm.org/D146518