[llvm] eac8e25 - [CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 22 11:41:16 PDT 2023
Author: Jay Foad
Date: 2023-03-22T18:41:10Z
New Revision: eac8e25ea5ee64ea46f93bba42d842fbde61609c
URL: https://github.com/llvm/llvm-project/commit/eac8e25ea5ee64ea46f93bba42d842fbde61609c
DIFF: https://github.com/llvm/llvm-project/commit/eac8e25ea5ee64ea46f93bba42d842fbde61609c.diff
LOG: [CodeGen] Fix type of MachineRegisterInfo::RegAllocHints. NFC.
The first member of the pair should be unsigned instead of Register
because it is the hint type, 0 for simple (target independent) hints and
other values for target dependent hints.
Differential Revision: https://reviews.llvm.org/D146646
Added:
Modified:
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
llvm/lib/CodeGen/CalcSpillWeights.cpp
llvm/lib/CodeGen/TargetRegisterInfo.cpp
llvm/lib/CodeGen/VirtRegMap.cpp
llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
index ce447be3af41f..fc4e5ca756248 100644
--- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -101,8 +101,9 @@ class MachineRegisterInfo {
/// first member of the pair being non-zero. If the hinted register is
/// virtual, it means the allocator should prefer the physical register
/// allocated to it if any.
- IndexedMap<std::pair<Register, SmallVector<Register, 4>>,
- VirtReg2IndexFunctor> RegAllocHints;
+ IndexedMap<std::pair<unsigned, SmallVector<Register, 4>>,
+ VirtReg2IndexFunctor>
+ RegAllocHints;
/// PhysRegUseDefLists - This is an array of the head of the use/def list for
/// physical registers.
@@ -818,27 +819,25 @@ class MachineRegisterInfo {
/// getRegAllocationHint - Return the register allocation hint for the
/// specified virtual register. If there are many hints, this returns the
/// one with the greatest weight.
- std::pair<Register, Register>
- getRegAllocationHint(Register VReg) const {
+ std::pair<unsigned, Register> getRegAllocationHint(Register VReg) const {
assert(VReg.isVirtual());
Register BestHint = (RegAllocHints[VReg.id()].second.size() ?
RegAllocHints[VReg.id()].second[0] : Register());
- return std::pair<Register, Register>(RegAllocHints[VReg.id()].first,
- BestHint);
+ return {RegAllocHints[VReg.id()].first, BestHint};
}
/// getSimpleHint - same as getRegAllocationHint except it will only return
/// a target independent hint.
Register getSimpleHint(Register VReg) const {
assert(VReg.isVirtual());
- std::pair<Register, Register> Hint = getRegAllocationHint(VReg);
+ std::pair<unsigned, Register> Hint = getRegAllocationHint(VReg);
return Hint.first ? Register() : Hint.second;
}
/// getRegAllocationHints - Return a reference to the vector of all
/// register allocation hints for VReg.
- const std::pair<Register, SmallVector<Register, 4>>
- &getRegAllocationHints(Register VReg) const {
+ const std::pair<unsigned, SmallVector<Register, 4>> &
+ getRegAllocationHints(Register VReg) const {
assert(VReg.isVirtual());
return RegAllocHints[VReg];
}
diff --git a/llvm/lib/CodeGen/CalcSpillWeights.cpp b/llvm/lib/CodeGen/CalcSpillWeights.cpp
index 1146c1d465da5..5a005ba7b414d 100644
--- a/llvm/lib/CodeGen/CalcSpillWeights.cpp
+++ b/llvm/lib/CodeGen/CalcSpillWeights.cpp
@@ -157,7 +157,7 @@ float VirtRegAuxInfo::weightCalcHelper(LiveInterval &LI, SlotIndex *Start,
unsigned NumInstr = 0; // Number of instructions using LI
SmallPtrSet<MachineInstr *, 8> Visited;
- std::pair<Register, Register> TargetHint = MRI.getRegAllocationHint(LI.reg());
+ std::pair<unsigned, Register> TargetHint = MRI.getRegAllocationHint(LI.reg());
if (LI.isSpillable()) {
Register Reg = LI.reg();
diff --git a/llvm/lib/CodeGen/TargetRegisterInfo.cpp b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
index e6baf00c06451..051de1612284c 100644
--- a/llvm/lib/CodeGen/TargetRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/TargetRegisterInfo.cpp
@@ -424,8 +424,8 @@ bool TargetRegisterInfo::getRegAllocationHints(
SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF,
const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
- const std::pair<Register, SmallVector<Register, 4>> &Hints_MRI =
- MRI.getRegAllocationHints(VirtReg);
+ const std::pair<unsigned, SmallVector<Register, 4>> &Hints_MRI =
+ MRI.getRegAllocationHints(VirtReg);
SmallSet<Register, 32> HintedRegs;
// First hint may be a target hint.
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index f80b06d7e9b7c..8e00712d2308e 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -116,10 +116,10 @@ bool VirtRegMap::hasPreferredPhys(Register VirtReg) const {
}
bool VirtRegMap::hasKnownPreference(Register VirtReg) const {
- std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(VirtReg);
- if (Register::isPhysicalRegister(Hint.second))
+ std::pair<unsigned, Register> Hint = MRI->getRegAllocationHint(VirtReg);
+ if (Hint.second.isPhysical())
return true;
- if (Register::isVirtualRegister(Hint.second))
+ if (Hint.second.isVirtual())
return hasPhys(Hint.second);
return false;
}
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index e6c6ab2efd50e..0fc2d8c6f5712 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -338,7 +338,7 @@ bool ARMBaseRegisterInfo::getRegAllocationHints(
SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF,
const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const {
const MachineRegisterInfo &MRI = MF.getRegInfo();
- std::pair<Register, Register> Hint = MRI.getRegAllocationHint(VirtReg);
+ std::pair<unsigned, Register> Hint = MRI.getRegAllocationHint(VirtReg);
unsigned Odd;
switch (Hint.first) {
@@ -391,7 +391,7 @@ bool ARMBaseRegisterInfo::getRegAllocationHints(
void ARMBaseRegisterInfo::updateRegAllocHint(Register Reg, Register NewReg,
MachineFunction &MF) const {
MachineRegisterInfo *MRI = &MF.getRegInfo();
- std::pair<Register, Register> Hint = MRI->getRegAllocationHint(Reg);
+ std::pair<unsigned, Register> Hint = MRI->getRegAllocationHint(Reg);
if ((Hint.first == ARMRI::RegPairOdd || Hint.first == ARMRI::RegPairEven) &&
Hint.second.isVirtual()) {
// If 'Reg' is one of the even / odd register pair and it's now changed
diff --git a/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp b/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
index eed5be7054e41..2b97e65bbf093 100644
--- a/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
+++ b/llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp
@@ -23,7 +23,7 @@ static void dropRegisterHintsFromFunction(Oracle &O, MachineFunction &MF) {
for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
Register Reg = Register::index2VirtReg(I);
- const std::pair<Register, SmallVector<Register, 4>> &Hints =
+ const std::pair<unsigned, SmallVector<Register, 4>> &Hints =
MRI.getRegAllocationHints(Reg);
if (Hints.second.empty())
continue;
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