[PATCH] D136675: [MachineCSE] Allow PRE of instructions that read physical registers
Vignesh Venkatasubramanian via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 22 10:37:31 PDT 2023
vigneshv added a comment.
Hi @john.brawn
This change is causing miscompilations in armv7. I was looking into a chromium bug [1] and eventually figured out that it was a regression caused by a clang update in the chromium tree.
I bisected further within the llvm changes and it bisects to this change. If i manually revert this change at current tip-of-tree, the code compiles correctly and works as expected.
Steps to reproduce:
1. build libyuv with "-march=armv7-a -mfloat-abi=softfp -mfpu=neon -O2 -mthumb"
2. Build the attached code snippet from [2] with "-march=armv7-a -mfloat-abi=softfp -mfpu=neon -O2 -mthumb -lyuv"
3. The resulting binary is doing some of the computations incorrectly after this change. If i revert this change, it works as expected.
Please let me know if you need any more details. :)
[1] https://bugs.chromium.org/p/chromium/issues/detail?id=1424089
[2] https://gist.github.com/vigneshvg/09c8414b94187349429641171475ce47
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136675/new/
https://reviews.llvm.org/D136675
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