[PATCH] D146637: [InstCombine] Try to recognize bswap pattern when calling fshl
Jun Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 22 09:00:22 PDT 2023
junaire created this revision.
junaire added a reviewer: RKSimon.
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junaire requested review of this revision.
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Herald added a subscriber: llvm-commits.
Alive2: https://alive2.llvm.org/ce/z/JiEXDg
Fixes: https://github.com/llvm/llvm-project/issues/60690
Signed-off-by: Jun Zhang <jun at junz.org>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D146637
Files:
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/bswap.ll
Index: llvm/test/Transforms/InstCombine/bswap.ll
===================================================================
--- llvm/test/Transforms/InstCombine/bswap.ll
+++ llvm/test/Transforms/InstCombine/bswap.ll
@@ -932,17 +932,7 @@
define i64 @call_fshl(i64 %result) {
; CHECK-LABEL: @call_fshl(
-; CHECK-NEXT: [[AND_I:%.*]] = lshr i64 [[RESULT:%.*]], 8
-; CHECK-NEXT: [[SHR_I:%.*]] = and i64 [[AND_I]], 71777214294589695
-; CHECK-NEXT: [[AND1_I:%.*]] = shl i64 [[RESULT]], 8
-; CHECK-NEXT: [[SHL_I:%.*]] = and i64 [[AND1_I]], -71777214294589696
-; CHECK-NEXT: [[OR_I:%.*]] = or i64 [[SHR_I]], [[SHL_I]]
-; CHECK-NEXT: [[AND_I7:%.*]] = shl i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHL_I8:%.*]] = and i64 [[AND_I7]], -281470681808896
-; CHECK-NEXT: [[AND1_I9:%.*]] = lshr i64 [[OR_I]], 16
-; CHECK-NEXT: [[SHR_I10:%.*]] = and i64 [[AND1_I9]], 281470681808895
-; CHECK-NEXT: [[OR_I11:%.*]] = or i64 [[SHL_I8]], [[SHR_I10]]
-; CHECK-NEXT: [[OR_I12:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[OR_I11]], i64 [[OR_I11]], i64 32)
+; CHECK-NEXT: [[OR_I12:%.*]] = call i64 @llvm.bswap.i64(i64 [[RESULT:%.*]])
; CHECK-NEXT: ret i64 [[OR_I12]]
;
%and.i = lshr i64 %result, 8
Index: llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -1234,9 +1234,8 @@
/// If all arguments of the intrinsic are unary shuffles with the same mask,
/// try to shuffle after the intrinsic.
-static Instruction *
-foldShuffledIntrinsicOperands(IntrinsicInst *II,
- InstCombiner::BuilderTy &Builder) {
+static Instruction *foldShuffledIntrinsicOperands(
+ IntrinsicInst *II, InstCombiner::BuilderTy &Builder, InstCombinerImpl &IC) {
// TODO: This should be extended to handle other intrinsics like fshl, ctpop,
// etc. Use llvm::isTriviallyVectorizable() and related to determine
// which intrinsics are safe to shuffle?
@@ -1246,9 +1245,15 @@
case Intrinsic::umax:
case Intrinsic::umin:
case Intrinsic::fma:
- case Intrinsic::fshl:
case Intrinsic::fshr:
break;
+ case Intrinsic::fshl: {
+ if (Instruction *BitOp =
+ IC.matchBSwapOrBitReverse(*II, /*MatchBSwaps*/ true,
+ /*MatchBitReversals*/ true))
+ return BitOp;
+ break;
+ }
default:
return nullptr;
}
@@ -3060,7 +3065,7 @@
}
}
- if (Instruction *Shuf = foldShuffledIntrinsicOperands(II, Builder))
+ if (Instruction *Shuf = foldShuffledIntrinsicOperands(II, Builder, *this))
return Shuf;
// Some intrinsics (like experimental_gc_statepoint) can be used in invoke
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