[llvm] 78e6818 - [amdgpu][nfc] clang-format AMDGPULowerModuleLDS for easier merging
Jon Chesterfield via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 21 18:50:27 PDT 2023
Author: Jon Chesterfield
Date: 2023-03-22T01:49:53Z
New Revision: 78e6818049c77c90225847758ac2a317230c0197
URL: https://github.com/llvm/llvm-project/commit/78e6818049c77c90225847758ac2a317230c0197
DIFF: https://github.com/llvm/llvm-project/commit/78e6818049c77c90225847758ac2a317230c0197.diff
LOG: [amdgpu][nfc] clang-format AMDGPULowerModuleLDS for easier merging
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
index 274597cb5607..ee9679ef9e51 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
@@ -315,11 +315,11 @@ class AMDGPULowerModuleLDS : public ModulePass {
DenseSet<GlobalVariable *> VariablesReachableThroughFunctionPointer;
for (Function &F : M.functions()) {
if (!isKernelLDS(&F))
- if (F.hasAddressTaken(nullptr,
- /* IgnoreCallbackUses */ false,
- /* IgnoreAssumeLikeCalls */ false,
- /* IgnoreLLVMUsed */ true,
- /* IgnoreArcAttachedCall */ false)) {
+ if (F.hasAddressTaken(nullptr,
+ /* IgnoreCallbackUses */ false,
+ /* IgnoreAssumeLikeCalls */ false,
+ /* IgnoreLLVMUsed */ true,
+ /* IgnoreArcAttachedCall */ false)) {
set_union(VariablesReachableThroughFunctionPointer,
direct_map_function[&F]);
}
@@ -476,7 +476,6 @@ class AMDGPULowerModuleLDS : public ModulePass {
IRBuilder<> Builder(Ctx);
Type *I32 = Type::getInt32Ty(Ctx);
-
for (size_t Index = 0; Index < ModuleScopeVariables.size(); Index++) {
auto *GV = ModuleScopeVariables[Index];
@@ -503,7 +502,6 @@ class AMDGPULowerModuleLDS : public ModulePass {
ConstantInt::get(I32, Index),
};
-
Value *Address = Builder.CreateInBoundsGEP(
LookupTable->getValueType(), LookupTable, GEPIdx, GV->getName());
@@ -523,7 +521,8 @@ class AMDGPULowerModuleLDS : public ModulePass {
DenseSet<Function *> KernelSet;
- if (VariableSet.empty()) return KernelSet;
+ if (VariableSet.empty())
+ return KernelSet;
for (Function &Func : M.functions()) {
if (Func.isDeclaration() || !isKernelLDS(&Func))
@@ -586,8 +585,9 @@ class AMDGPULowerModuleLDS : public ModulePass {
// strategy
continue;
}
- CandidateTy Candidate(GV, K.second.size(),
- DL.getTypeAllocSize(GV->getValueType()).getFixedValue());
+ CandidateTy Candidate(
+ GV, K.second.size(),
+ DL.getTypeAllocSize(GV->getValueType()).getFixedValue());
if (MostUsed < Candidate)
MostUsed = Candidate;
}
@@ -638,44 +638,42 @@ class AMDGPULowerModuleLDS : public ModulePass {
// the backend and lowered to a SGPR which can be read from using
// amdgcn_lds_kernel_id.
- std::vector<Function *> OrderedKernels;
-
- for (Function &Func : M->functions()) {
- if (Func.isDeclaration())
- continue;
- if (!isKernelLDS(&Func))
- continue;
-
- if (KernelsThatAllocateTableLDS.contains(&Func)) {
- assert(Func.hasName()); // else fatal error earlier
- OrderedKernels.push_back(&Func);
- }
- }
+ std::vector<Function *> OrderedKernels;
- // Put them in an arbitrary but reproducible order
- llvm::sort(OrderedKernels.begin(), OrderedKernels.end(),
- [](const Function *lhs, const Function *rhs) -> bool {
- return lhs->getName() < rhs->getName();
- });
+ for (Function &Func : M->functions()) {
+ if (Func.isDeclaration())
+ continue;
+ if (!isKernelLDS(&Func))
+ continue;
- // Annotate the kernels with their order in this vector
- LLVMContext &Ctx = M->getContext();
- IRBuilder<> Builder(Ctx);
+ if (KernelsThatAllocateTableLDS.contains(&Func)) {
+ assert(Func.hasName()); // else fatal error earlier
+ OrderedKernels.push_back(&Func);
+ }
+ }
- if (OrderedKernels.size() > UINT32_MAX) {
- // 32 bit keeps it in one SGPR. > 2**32 kernels won't fit on the GPU
- report_fatal_error("Unimplemented LDS lowering for > 2**32 kernels");
- }
+ // Put them in an arbitrary but reproducible order
+ llvm::sort(OrderedKernels.begin(), OrderedKernels.end(),
+ [](const Function *lhs, const Function *rhs) -> bool {
+ return lhs->getName() < rhs->getName();
+ });
- for (size_t i = 0; i < OrderedKernels.size(); i++) {
- Metadata *AttrMDArgs[1] = {
- ConstantAsMetadata::get(Builder.getInt32(i)),
- };
- OrderedKernels[i]->setMetadata("llvm.amdgcn.lds.kernel.id",
- MDNode::get(Ctx, AttrMDArgs));
+ // Annotate the kernels with their order in this vector
+ LLVMContext &Ctx = M->getContext();
+ IRBuilder<> Builder(Ctx);
- }
+ if (OrderedKernels.size() > UINT32_MAX) {
+ // 32 bit keeps it in one SGPR. > 2**32 kernels won't fit on the GPU
+ report_fatal_error("Unimplemented LDS lowering for > 2**32 kernels");
+ }
+ for (size_t i = 0; i < OrderedKernels.size(); i++) {
+ Metadata *AttrMDArgs[1] = {
+ ConstantAsMetadata::get(Builder.getInt32(i)),
+ };
+ OrderedKernels[i]->setMetadata("llvm.amdgcn.lds.kernel.id",
+ MDNode::get(Ctx, AttrMDArgs));
+ }
return OrderedKernels;
}
@@ -979,22 +977,22 @@ class AMDGPULowerModuleLDS : public ModulePass {
// TODO: Looks like a latent bug, Replacement may not be marked
// UsedByKernel here
replaceLDSVariablesWithStruct(M, Vec, Replacement, [](Use &U) {
- return isa<Instruction>(U.getUser());
+ return isa<Instruction>(U.getUser());
});
}
if (!KernelsThatAllocateTableLDS.empty()) {
- LLVMContext &Ctx = M.getContext();
- IRBuilder<> Builder(Ctx);
+ LLVMContext &Ctx = M.getContext();
+ IRBuilder<> Builder(Ctx);
- // The ith element of this vector is kernel id i
- std::vector<Function *> OrderedKernels =
- assignLDSKernelIDToEachKernel(&M, KernelsThatAllocateTableLDS);
+ // The ith element of this vector is kernel id i
+ std::vector<Function *> OrderedKernels =
+ assignLDSKernelIDToEachKernel(&M, KernelsThatAllocateTableLDS);
- for (size_t i = 0; i < OrderedKernels.size(); i++) {
- markUsedByKernel(Builder, OrderedKernels[i],
- KernelToReplacement[OrderedKernels[i]].SGV);
- }
+ for (size_t i = 0; i < OrderedKernels.size(); i++) {
+ markUsedByKernel(Builder, OrderedKernels[i],
+ KernelToReplacement[OrderedKernels[i]].SGV);
+ }
// The order must be consistent between lookup table and accesses to
// lookup table
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