[llvm] abe0362 - [RISCV] Remove 'rs1' field from RVInst16 class. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 21 14:59:12 PDT 2023
Author: Craig Topper
Date: 2023-03-21T14:58:53-07:00
New Revision: abe0362dd8c358bfdc7477201b683c7f2494bd93
URL: https://github.com/llvm/llvm-project/commit/abe0362dd8c358bfdc7477201b683c7f2494bd93
DIFF: https://github.com/llvm/llvm-project/commit/abe0362dd8c358bfdc7477201b683c7f2494bd93.diff
LOG: [RISCV] Remove 'rs1' field from RVInst16 class. NFC
Added:
Modified:
llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
index fa1c3e9164123..db93c1161580d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrFormatsC.td
@@ -53,7 +53,6 @@ class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
: RVInst16<outs, ins, opcodestr, argstr, [], InstFormatCI> {
bits<10> imm;
bits<5> rd;
- bits<5> rs1;
let Inst{15-13} = funct3;
let Inst{12} = imm{5};
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