[PATCH] D146512: [TLI] Fold ~X s>/u< ~Y --> Y s>/u< X

[Jun Zhang via Phabricator via llvm-commits]

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Fixes: https://github.com/llvm/llvm-project/issues/61120

Signed-off-by: Jun Zhang <jun at junz.org>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146512

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/X86/setcc-combine.ll


Index: llvm/test/CodeGen/X86/setcc-combine.ll
===================================================================
--- llvm/test/CodeGen/X86/setcc-combine.ll
+++ llvm/test/CodeGen/X86/setcc-combine.ll
@@ -503,10 +503,8 @@
 define i64 @cmp_sgt(i64 %a, i64 %b) {
 ; CHECK-LABEL: cmp_sgt:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notq %rdi
-; CHECK-NEXT:    notq %rsi
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpq %rsi, %rdi
+; CHECK-NEXT:    cmpq %rdi, %rsi
 ; CHECK-NEXT:    setg %al
 ; CHECK-NEXT:    negq %rax
 ; CHECK-NEXT:    retq
@@ -520,14 +518,14 @@
 define <2 x i64> @cmp_sgt_vec(<2 x i64> %a, <2 x i64> %b) {
 ; CHECK-LABEL: cmp_sgt_vec:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [18446744071562067967,18446744071562067967]
-; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648]
 ; CHECK-NEXT:    pxor %xmm2, %xmm0
-; CHECK-NEXT:    movdqa %xmm0, %xmm2
-; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm0, %xmm2
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
-; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
 ; CHECK-NEXT:    pand %xmm3, %xmm1
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
 ; CHECK-NEXT:    por %xmm1, %xmm0
@@ -542,10 +540,8 @@
 define i64 @cmp_ule(i64 %a, i64 %b) {
 ; CHECK-LABEL: cmp_ule:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    notq %rdi
-; CHECK-NEXT:    notq %rsi
 ; CHECK-NEXT:    xorl %eax, %eax
-; CHECK-NEXT:    cmpq %rdi, %rsi
+; CHECK-NEXT:    cmpq %rsi, %rdi
 ; CHECK-NEXT:    adcq $-1, %rax
 ; CHECK-NEXT:    retq
   %na = xor i64 %a, -1
@@ -558,14 +554,14 @@
 define <2 x i64> @cmp_ule_vec(<2 x i64> %a, <2 x i64> %b) {
 ; CHECK-LABEL: cmp_ule_vec:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372034707292159,9223372034707292159]
-; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
 ; CHECK-NEXT:    pxor %xmm2, %xmm0
-; CHECK-NEXT:    movdqa %xmm0, %xmm2
-; CHECK-NEXT:    pcmpgtd %xmm1, %xmm2
+; CHECK-NEXT:    pxor %xmm2, %xmm1
+; CHECK-NEXT:    movdqa %xmm1, %xmm2
+; CHECK-NEXT:    pcmpgtd %xmm0, %xmm2
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm3 = xmm2[0,0,2,2]
-; CHECK-NEXT:    pcmpeqd %xmm1, %xmm0
-; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
+; CHECK-NEXT:    pcmpeqd %xmm0, %xmm1
+; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,3,3]
 ; CHECK-NEXT:    pand %xmm3, %xmm0
 ; CHECK-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
 ; CHECK-NEXT:    por %xmm0, %xmm1
Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -4977,6 +4977,19 @@
       return DAG.getSetCC(dl, VT, N0, N1, NewCond);
   }
 
+  // ~X s> ~Y --> Y s> X
+  // ~X u< ~Y --> Y u< X
+  if ((Cond == ISD::SETGT || Cond == ISD::SETULE) && N0.getOpcode() == ISD::XOR &&
+      N0.getValueType().isInteger()) {
+    if (N0.getOpcode() == N1.getOpcode()) {
+      if (N0.getOperand(1) == N1.getOperand(1)) {
+        if (isAllOnesConstant(N0.getOperand(1)) ||
+            ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode()))
+          return DAG.getSetCC(dl, VT, N1.getOperand(0), N0.getOperand(0), Cond);
+      }
+    }
+  }
+
   if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
       N0.getValueType().isInteger()) {
     if (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::SUB ||


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