[PATCH] D146488: [RISCV] Move compressible registers to the beginning of the FP allocation order.

[Wang Pengcheng via Phabricator via llvm-commits]

pcwang-thead added a comment.

Vote +1 from me. Thanks!
Performance and code size should have some improvements according to my previous assessment  in D118020 <https://reviews.llvm.org/D118020>.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D146488/new/

https://reviews.llvm.org/D146488