[PATCH] D146311: [AArch64] Add asm aliases for MOV, LDR, STR with predicate-as-counter

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3843
 defm WHILELS_CXX  : sve2p1_int_while_rr_pn<"whilels", 0b111>;
+
+def : InstAlias<"ldr $Pt, [$Rn, $imm9, mul vl]",
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nit: Could you add a comment here saying that these are aliases for existing (SVE) instructions for which predicate-as-counter can be accepted as an operand to the instruction?


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Comment at: llvm/test/MC/AArch64/SVE/ldr_alias.s:1
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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Is it worth combining these tests into a single `predicate-as-counter-aliases.s` test?


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Comment at: llvm/test/MC/AArch64/SVE/orr.s:156
 
-
 // --------------------------------------------------------------------------//
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nit: unrelated whitespace change?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D146311/new/

https://reviews.llvm.org/D146311