[llvm] 09f756c - [AMDGPU] Add release note for ommited barrier waitcnt

[Austin Kerbow via llvm-commits]

Author: Austin Kerbow
Date: 2023-03-19T21:15:28-07:00
New Revision: 09f756c8800a1498f0d0f9965133f00339989bba

URL: https://github.com/llvm/llvm-project/commit/09f756c8800a1498f0d0f9965133f00339989bba
DIFF: https://github.com/llvm/llvm-project/commit/09f756c8800a1498f0d0f9965133f00339989bba.diff

LOG: [AMDGPU] Add release note for ommited barrier waitcnt

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D146353

Added: 
    

Modified: 
    llvm/docs/ReleaseNotes.rst

Removed: 
    


################################################################################
diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index c752b8dbf01c6..9d7b1dbd79ef1 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -84,6 +84,12 @@ Changes to the AArch64 Backend
 
 Changes to the AMDGPU Backend
 -----------------------------
+* More fine-grained synchronization around barriers for newer architectures
+  (gfx90a+, gfx10+). The AMDGPU backend now omits previously automatically
+  generated waitcnt instructions before barriers, allowing for more precise
+  control. Users must now use memory fences to implement fine-grained
+  synchronization strategies around barriers. Refer to `AMDGPU memory model
+  <AMDGPUUsage.html#memory-model>`__.
 
 Changes to the ARM Backend
 --------------------------