[PATCH] D140381: [PowerPC] Use Power9 test data class instruction to lower IS_FPCLASS

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11064
+        MVT::i1)};
+    if (Mask & fcPosNormal)
+      Sign = DAG.getNOT(Dl, Sign, MVT::i1);
----------------
sepavloff wrote:
> It seems that if `Mask` is `fcNormal` (which is `fcPosNormal | fcNegNormal`), the OR node is not needed.
It's already been handled by previous condition `(Mask & fcNormal) == fcNormal`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140381/new/

https://reviews.llvm.org/D140381