[PATCH] D146353: [AMDGPU] Add release note for ommited barrier waitcnt

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa created this revision.
kerbowa added reviewers: bcahoon, arsenm.
Herald added subscribers: kosarev, tpr, dstuttard, yaxunl, kzhuravl.
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kerbowa requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D146353

Files:
  llvm/docs/ReleaseNotes.rst


Index: llvm/docs/ReleaseNotes.rst
===================================================================
--- llvm/docs/ReleaseNotes.rst
+++ llvm/docs/ReleaseNotes.rst
@@ -84,6 +84,12 @@
 
 Changes to the AMDGPU Backend
 -----------------------------
+* More fine-grained synchronization around barriers for newer architectures
+  (gfx90a+, gfx10+). The AMDGPU backend now omits previously automatically
+  generated waitcnt instructions before barriers, allowing for more precise
+  control. Users must now use memory fences to implement fine-grained
+  synchronization strategies around barriers. Refer to `AMDGPU memory model
+  <AMDGPUUsage.html#memory-model>`__.
 
 Changes to the ARM Backend
 --------------------------


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