[llvm] 2726fd2 - Revert "InstCombine: Fold is.fpclass nan|zero to fcmp ueq 0"
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 17 08:42:45 PDT 2023
Author: Matt Arsenault
Date: 2023-03-17T11:42:38-04:00
New Revision: 2726fd2e8cb7a2452b2a2bafe5aeed34c7b1e064
URL: https://github.com/llvm/llvm-project/commit/2726fd2e8cb7a2452b2a2bafe5aeed34c7b1e064
DIFF: https://github.com/llvm/llvm-project/commit/2726fd2e8cb7a2452b2a2bafe5aeed34c7b1e064.diff
LOG: Revert "InstCombine: Fold is.fpclass nan|zero to fcmp ueq 0"
This reverts commit b5ff7640cd1391ebe67e47a043fed6faf8bdcbb7.
Merge resolution gone wrong merged two unrelated patches
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
llvm/test/Transforms/InstCombine/is_fpclass.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index f0d5689a9bbbb..4b1bceef25d6a 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -846,11 +846,7 @@ Instruction *InstCombinerImpl::foldIntrinsicIsFPClass(IntrinsicInst &II) {
Value *Src1 = II.getArgOperand(1);
const ConstantInt *CMask = cast<ConstantInt>(Src1);
FPClassTest Mask = static_cast<FPClassTest>(CMask->getZExtValue());
- const bool IsUnordered = (Mask & fcNan) == fcNan;
- const bool IsOrdered = (Mask & fcNan) == fcNone;
- const FPClassTest OrderedMask = Mask & ~fcNan;
- const FPClassTest OrderedInvertedMask = ~OrderedMask & ~fcNan;
-
+ FPClassTest InvertedMask = ~Mask;
const bool IsStrict = II.isStrictFP();
Value *FNegSrc;
@@ -867,37 +863,6 @@ Instruction *InstCombinerImpl::foldIntrinsicIsFPClass(IntrinsicInst &II) {
return replaceOperand(II, 0, FAbsSrc);
}
- // TODO: is.fpclass(x, fcInf) -> fabs(x) == inf
-
- if ((OrderedMask == fcPosInf || OrderedMask == fcNegInf) &&
- (IsOrdered || IsUnordered) && !IsStrict) {
- // is.fpclass(x, fcPosInf) -> fcmp oeq x, +inf
- // is.fpclass(x, fcNegInf) -> fcmp oeq x, -inf
- // is.fpclass(x, fcPosInf|fcNan) -> fcmp ueq x, +inf
- // is.fpclass(x, fcNegInf|fcNan) -> fcmp ueq x, -inf
- Constant *Inf =
- ConstantFP::getInfinity(Src0->getType(), OrderedMask == fcNegInf);
- Value *EqInf = IsUnordered ? Builder.CreateFCmpUEQ(Src0, Inf)
- : Builder.CreateFCmpOEQ(Src0, Inf);
-
- EqInf->takeName(&II);
- return replaceInstUsesWith(II, EqInf);
- }
-
- if ((OrderedInvertedMask == fcPosInf || OrderedInvertedMask == fcNegInf) &&
- (IsOrdered || IsUnordered) && !IsStrict) {
- // is.fpclass(x, ~fcPosInf) -> fcmp une x, +inf
- // is.fpclass(x, ~fcNegInf) -> fcmp une x, -inf
- // is.fpclass(x, ~fcPosInf & ~fcNan) -> fcmp one x, +inf
- // is.fpclass(x, ~fcNegInf & ~fcNan) -> fcmp one x, -inf
- Constant *Inf = ConstantFP::getInfinity(Src0->getType(),
- OrderedInvertedMask == fcNegInf);
- Value *NeInf = IsUnordered ? Builder.CreateFCmpUNE(Src0, Inf)
- : Builder.CreateFCmpONE(Src0, Inf);
- NeInf->takeName(&II);
- return replaceInstUsesWith(II, NeInf);
- }
-
if (Mask == fcNan && !IsStrict) {
// Equivalent of isnan. Replace with standard fcmp if we don't care about FP
// exceptions.
@@ -915,24 +880,23 @@ Instruction *InstCombinerImpl::foldIntrinsicIsFPClass(IntrinsicInst &II) {
return replaceInstUsesWith(II, FCmp);
}
- if (!IsStrict && (IsOrdered || IsUnordered) &&
- fpclassTestIsFCmp0(OrderedMask, *II.getFunction(), Src0->getType())) {
- Constant *Zero = ConstantFP::getZero(Src0->getType());
+ if (!IsStrict &&
+ fpclassTestIsFCmp0(static_cast<FPClassTest>(Mask),
+ *II.getParent()->getParent(), Src0->getType())) {
// Equivalent of == 0.
- Value *FCmp = IsUnordered ? Builder.CreateFCmpUEQ(Src0, Zero)
- : Builder.CreateFCmpOEQ(Src0, Zero);
+ Value *FCmp =
+ Builder.CreateFCmpOEQ(Src0, ConstantFP::get(Src0->getType(), 0.0));
+
FCmp->takeName(&II);
return replaceInstUsesWith(II, FCmp);
}
- if (!IsStrict && (IsOrdered || IsUnordered) &&
- fpclassTestIsFCmp0(OrderedInvertedMask, *II.getFunction(),
- Src0->getType())) {
- Constant *Zero = ConstantFP::getZero(Src0->getType());
-
+ if (!IsStrict &&
+ fpclassTestIsFCmp0(static_cast<FPClassTest>(InvertedMask),
+ *II.getParent()->getParent(), Src0->getType())) {
// Equivalent of !(x == 0).
- Value *FCmp = IsUnordered ? Builder.CreateFCmpUNE(Src0, Zero)
- : Builder.CreateFCmpONE(Src0, Zero);
+ Value *FCmp =
+ Builder.CreateFCmpUNE(Src0, ConstantFP::get(Src0->getType(), 0.0));
FCmp->takeName(&II);
return replaceInstUsesWith(II, FCmp);
diff --git a/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll b/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
index 66ee31f57f961..9b53f17de9345 100644
--- a/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
+++ b/llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
@@ -307,7 +307,7 @@ define i1 @class_normal_or_fcmp_ueq_zero(half %x) {
define i1 @fcmp_one_zero_or_class_normal(half %x) {
; CHECK-LABEL: @fcmp_one_zero_or_class_normal(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xH0000
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 924)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%one.inf = fcmp one half %x, 0.0
@@ -344,7 +344,7 @@ define i1 @fcmp_one_zero_or_class_normal_dynamic(half %x) #2 {
define i1 @class_normal_or_fcmp_one_zero(half %x) {
; CHECK-LABEL: @class_normal_or_fcmp_one_zero(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xH0000
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 924)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%one.inf = fcmp one half %x, 0.0
diff --git a/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll b/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
index cd69bc83c6521..e7d21681ff56c 100644
--- a/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
+++ b/llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
@@ -224,7 +224,7 @@ define i1 @not_isfinite_or_zero_f16_multi_use_cmp1(half %x, ptr %ptr) {
; Negative test
define i1 @not_isfinite_or_zero_f16_neg_inf(half %x) {
; CHECK-LABEL: @not_isfinite_or_zero_f16_neg_inf(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq half [[X:%.*]], 0xH0000
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 99)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fabs = call half @llvm.fabs.f16(half %x)
@@ -918,7 +918,7 @@ define i1 @isnormalinf_and_inf(half %x) #0 {
; -> pinf
define i1 @posisnormalinf_and_posinf(half %x) #0 {
; CHECK-LABEL: @posisnormalinf_and_posinf(
-; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
; CHECK-NEXT: ret i1 [[AND]]
;
%fabs = call half @llvm.fabs.f16(half %x)
@@ -931,7 +931,7 @@ define i1 @posisnormalinf_and_posinf(half %x) #0 {
; -> pinf
define i1 @isnormalinf_and_posinf(half %x) #0 {
; CHECK-LABEL: @isnormalinf_and_posinf(
-; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
; CHECK-NEXT: ret i1 [[AND]]
;
%fabs = call half @llvm.fabs.f16(half %x)
@@ -1073,7 +1073,7 @@ define i1 @olt_smallest_normal_or_uno(half %x) #0 {
define i1 @olt_smallest_normal_or_finite(half %x) #0 {
; CHECK-LABEL: @olt_smallest_normal_or_finite(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fabs = call half @llvm.fabs.f16(half %x)
@@ -1120,7 +1120,7 @@ define i1 @uge_smallest_normal_and_uno(half %x) #0 {
; -> true
define i1 @olt_infinity_or_finite(half %x) #0 {
; CHECK-LABEL: @olt_infinity_or_finite(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%lt.infinity = fcmp olt half %x, 0xH7C00
@@ -1156,7 +1156,7 @@ define i1 @olt_infinity_or_ord(half %x) #0 {
; -> ~posinf
define i1 @olt_infinity_or_uno(half %x) #0 {
; CHECK-LABEL: @olt_infinity_or_uno(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp une half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%lt.infinity = fcmp olt half %x, 0xH7C00
@@ -1167,7 +1167,7 @@ define i1 @olt_infinity_or_uno(half %x) #0 {
define i1 @olt_infinity_or_subnormal(half %x) #0 {
; CHECK-LABEL: @olt_infinity_or_subnormal(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp one half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 508)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%lt.infinity = fcmp olt half %x, 0xH7C00
@@ -1205,7 +1205,7 @@ define i1 @olt_infinity_and_not_subnormal(half %x) #0 {
; -> ninf
define i1 @olt_infinity_and_ueq_inf(half %x) #0 {
; CHECK-LABEL: @olt_infinity_and_ueq_inf(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%lt.infinity = fcmp olt half %x, 0xH7C00
@@ -1241,7 +1241,7 @@ define i1 @olt_smallest_normal_or_ueq_inf(half %x) #0 {
; -> ~pinf
define i1 @olt_smallest_normal_or_une_inf(half %x) #0 {
; CHECK-LABEL: @olt_smallest_normal_or_une_inf(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp une half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%lt.normal = fcmp olt half %x, 0xH0400
@@ -1302,7 +1302,7 @@ define i1 @oge_fabs_eq_inf_and_ord(half %x) #0 {
define i1 @oge_eq_inf_and_ord(half %x) #0 {
; CHECK-LABEL: @oge_eq_inf_and_ord(
-; CHECK-NEXT: [[AND:%.*]] = fcmp oeq half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[AND:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 512)
; CHECK-NEXT: ret i1 [[AND]]
;
%oge.fabs.inf = fcmp oge half %x, 0xH7C00
@@ -1325,7 +1325,7 @@ define i1 @oge_fabs_eq_inf_or_uno(half %x) #0 {
define i1 @oge_eq_inf_or_uno(half %x) #0 {
; CHECK-LABEL: @oge_eq_inf_or_uno(
-; CHECK-NEXT: [[OR:%.*]] = fcmp ueq half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 515)
; CHECK-NEXT: ret i1 [[OR]]
;
%oge.fabs.inf = fcmp oge half %x, 0xH7C00
@@ -1372,7 +1372,7 @@ define i1 @ult_fabs_eq_inf_or_uno(half %x) #0 {
define i1 @ult_eq_inf_or_uno(half %x) #0 {
; CHECK-LABEL: @ult_eq_inf_or_uno(
-; CHECK-NEXT: [[OR:%.*]] = fcmp une half [[X:%.*]], 0xH7C00
+; CHECK-NEXT: [[OR:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 511)
; CHECK-NEXT: ret i1 [[OR]]
;
%ult.fabs.inf = fcmp ult half %x, 0xH7C00
@@ -1411,7 +1411,7 @@ define i1 @oeq_neginfinity_or_olt_smallest_normal(half %x) #0 {
; -> ninf
define i1 @oeq_neginfinity_and_olt_smallest_normal(half %x) #0 {
; CHECK-LABEL: @oeq_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
@@ -1458,7 +1458,7 @@ define i1 @oeq_neginfinity_or_ord(half %x) #0 {
; -> ninf
define i1 @oeq_neginfinity_and_ord(half %x) #0 {
; CHECK-LABEL: @oeq_neginfinity_and_ord(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%oeq.neg.infinity = fcmp oeq half %x, 0xHFC00
@@ -1531,7 +1531,7 @@ define i1 @one_neginfinity_and_olt_smallest_normal(half %x) #0 {
; -> ~ninf
define i1 @one_neginfinity_or_uno(half %x) #0 {
; CHECK-LABEL: @one_neginfinity_or_uno(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp une half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 1019)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%one.neg.infinity = fcmp one half %x, 0xHFC00
@@ -1578,7 +1578,7 @@ define i1 @ueq_neginfinity_or_olt_smallest_normal(half %x) #0 {
; -> ninf
define i1 @ueq_neginfinity_and_olt_smallest_normal(half %x) #0 {
; CHECK-LABEL: @ueq_neginfinity_and_olt_smallest_normal(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
@@ -1590,7 +1590,7 @@ define i1 @ueq_neginfinity_and_olt_smallest_normal(half %x) #0 {
; -> nan|ninf
define i1 @ueq_neginfinity_or_uno(half %x) #0 {
; CHECK-LABEL: @ueq_neginfinity_or_uno(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp ueq half [[X:%.*]], 0xHFC00
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f16(half [[X:%.*]], i32 7)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%ueq.neg.infinity = fcmp ueq half %x, 0xHFC00
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index eba5b25dc5886..fffd23b7edaa2 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -152,7 +152,7 @@ define <2 x i1> @test_class_is_p0_n0_v2f32_dynamic(<2 x float> %x) "denormal-fp-
define i1 @test_class_is_p0_n0_or_nan_f32(float %x) {
; CHECK-LABEL: @test_class_is_p0_n0_or_nan_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 99)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 99) ; fcZero|fcNan
@@ -161,7 +161,7 @@ define i1 @test_class_is_p0_n0_or_nan_f32(float %x) {
define <2 x i1> @test_class_is_p0_n0_or_nan_v2f32(<2 x float> %x) {
; CHECK-LABEL: @test_class_is_p0_n0_or_nan_v2f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq <2 x float> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 99)
; CHECK-NEXT: ret <2 x i1> [[VAL]]
;
%val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 99) ; fcZero|fcNan
@@ -207,7 +207,7 @@ define <2 x i1> @test_class_is_p0_n0_or_sub_or_nan_v2f32(<2 x float> %x) {
define i1 @test_class_is_p0_n0_or_sub_or_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" {
; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_f32_daz(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 243)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 243) ; fcZero|fcNan|fcSubnormal
@@ -216,7 +216,7 @@ define i1 @test_class_is_p0_n0_or_sub_or_nan_f32_daz(float %x) "denormal-fp-math
define <2 x i1> @test_class_is_p0_n0_or_sub_or_nan_v2f32_daz(<2 x float> %x) "denormal-fp-math-f32"="ieee,preserve-sign" {
; CHECK-LABEL: @test_class_is_p0_n0_or_sub_or_nan_v2f32_daz(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq <2 x float> [[X:%.*]], zeroinitializer
+; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 243)
; CHECK-NEXT: ret <2 x i1> [[VAL]]
;
%val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 243) ; fcZero|fcNan|fcSubnormal
@@ -243,7 +243,7 @@ define i1 @test_class_is_p0_n0_or_sub_or_qnan_f32_daz(float %x) "denormal-fp-mat
define i1 @test_class_is_not_p0_n0_or_nan_f32(float %x) {
; CHECK-LABEL: @test_class_is_not_p0_n0_or_nan_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp one float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 924)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 924) ; ~fcZero & ~fcNan & fcAllFlags
@@ -306,7 +306,7 @@ define i1 @test_class_is_not_p0_n0_or_sub_and_not_nan_f32(float %x) {
define i1 @test_class_is_not_p0_n0_or_sub_and_not_nan_f32_daz(float %x) "denormal-fp-math-f32"="ieee,preserve-sign" {
; CHECK-LABEL: @test_class_is_not_p0_n0_or_sub_and_not_nan_f32_daz(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp one float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 780)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 780) ; ~(fcZero|fcSubonrmal) & ~fcNan & fcAllFlags
@@ -486,7 +486,7 @@ define <2 x i1> @test_class_is_p0_n0_psub_nsub_v2f32_dynamic(<2 x float> %x) "de
define i1 @test_class_is_pinf_f32(float %x) {
; CHECK-LABEL: @test_class_is_pinf_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0x7FF0000000000000
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 512)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; fcPosInf
@@ -495,7 +495,7 @@ define i1 @test_class_is_pinf_f32(float %x) {
define i1 @test_class_is_pinf_or_nan_f32(float %x) {
; CHECK-LABEL: @test_class_is_pinf_or_nan_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0x7FF0000000000000
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 515)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 515) ; fcPosInf|fcNan
@@ -504,7 +504,7 @@ define i1 @test_class_is_pinf_or_nan_f32(float %x) {
define <2 x i1> @test_class_is_pinf_v2f32(<2 x float> %x) {
; CHECK-LABEL: @test_class_is_pinf_v2f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], <float 0x7FF0000000000000, float 0x7FF0000000000000>
+; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 512)
; CHECK-NEXT: ret <2 x i1> [[VAL]]
;
%val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 512) ; fcPosInf
@@ -513,7 +513,7 @@ define <2 x i1> @test_class_is_pinf_v2f32(<2 x float> %x) {
define i1 @test_class_is_ninf_f32(float %x) {
; CHECK-LABEL: @test_class_is_ninf_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq float [[X:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; fcNegInf
@@ -522,7 +522,7 @@ define i1 @test_class_is_ninf_f32(float %x) {
define i1 @test_class_is_ninf_or_nan_f32(float %x) {
; CHECK-LABEL: @test_class_is_ninf_or_nan_f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp ueq float [[X:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 7)
; CHECK-NEXT: ret i1 [[VAL]]
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 7) ; fcNegInf|fcNan
@@ -531,7 +531,7 @@ define i1 @test_class_is_ninf_or_nan_f32(float %x) {
define <2 x i1> @test_class_is_ninf_v2f32(<2 x float> %x) {
; CHECK-LABEL: @test_class_is_ninf_v2f32(
-; CHECK-NEXT: [[VAL:%.*]] = fcmp oeq <2 x float> [[X:%.*]], <float 0xFFF0000000000000, float 0xFFF0000000000000>
+; CHECK-NEXT: [[VAL:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 4)
; CHECK-NEXT: ret <2 x i1> [[VAL]]
;
%val = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %x, i32 4) ; fcNegInf
@@ -1015,8 +1015,8 @@ define i1 @test_fold_or_class_f32_0(float %a) {
define i1 @test_fold_or3_class_f32_0(float %a) {
; CHECK-LABEL: @test_fold_or3_class_f32_0(
-; CHECK-NEXT: [[OR_1:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000
-; CHECK-NEXT: ret i1 [[OR_1]]
+; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
+; CHECK-NEXT: ret i1 [[CLASS2]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2)
@@ -1054,8 +1054,8 @@ define i1 @test_fold_or_all_tests_class_f32_0(float %a) {
define i1 @test_fold_or_class_f32_1(float %a) {
; CHECK-LABEL: @test_fold_or_class_f32_1(
-; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12)
-; CHECK-NEXT: ret i1 [[CLASS1]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12)
+; CHECK-NEXT: ret i1 [[CLASS0]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
@@ -1065,7 +1065,7 @@ define i1 @test_fold_or_class_f32_1(float %a) {
define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) {
; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -1080,7 +1080,7 @@ define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) {
define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) {
; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use1(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -1095,8 +1095,8 @@ define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) {
define i1 @test_fold_or_class_f32_2(float %a) {
; CHECK-LABEL: @test_fold_or_class_f32_2(
-; CHECK-NEXT: [[OR:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000
-; CHECK-NEXT: ret i1 [[OR]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
+; CHECK-NEXT: ret i1 [[CLASS0]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
@@ -1106,7 +1106,7 @@ define i1 @test_fold_or_class_f32_2(float %a) {
define i1 @test_no_fold_or_class_f32_0(float %a, float %b) {
; CHECK-LABEL: @test_no_fold_or_class_f32_0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8)
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
; CHECK-NEXT: ret i1 [[OR]]
@@ -1119,8 +1119,8 @@ define i1 @test_no_fold_or_class_f32_0(float %a, float %b) {
define <2 x i1> @test_fold_or_class_v2f32(<2 x float> %a) {
; CHECK-LABEL: @test_fold_or_class_v2f32(
-; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 12)
-; CHECK-NEXT: ret <2 x i1> [[CLASS1]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 12)
+; CHECK-NEXT: ret <2 x i1> [[CLASS0]]
;
%class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 4)
%class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 8)
@@ -1250,8 +1250,8 @@ define i1 @test_no_fold_and_class_f32_multi_use1(float %a, ptr %ptr) {
define i1 @test_fold_and_class_f32_2(float %a) {
; CHECK-LABEL: @test_fold_and_class_f32_2(
-; CHECK-NEXT: [[AND:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000
-; CHECK-NEXT: ret i1 [[AND]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
+; CHECK-NEXT: ret i1 [[CLASS0]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
@@ -1283,7 +1283,7 @@ define i1 @test_fold_and_class_f32_4(float %a) {
define i1 @test_no_fold_and_class_f32_0(float %a, float %b) {
; CHECK-LABEL: @test_no_fold_and_class_f32_0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 15)
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CLASS0]], [[CLASS1]]
; CHECK-NEXT: ret i1 [[AND]]
@@ -1296,8 +1296,8 @@ define i1 @test_no_fold_and_class_f32_0(float %a, float %b) {
define <2 x i1> @test_fold_and_class_v2f32(<2 x float> %a) {
; CHECK-LABEL: @test_fold_and_class_v2f32(
-; CHECK-NEXT: [[CLASS1:%.*]] = fcmp ueq <2 x float> [[A:%.*]], <float 0xFFF0000000000000, float 0xFFF0000000000000>
-; CHECK-NEXT: ret <2 x i1> [[CLASS1]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 7)
+; CHECK-NEXT: ret <2 x i1> [[CLASS0]]
;
%class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 7)
%class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 15)
@@ -1322,10 +1322,8 @@ define i1 @test_fold_xor_class_f32_0(float %a) {
define i1 @test_fold_xor3_class_f32_0(float %a) {
; CHECK-LABEL: @test_fold_xor3_class_f32_0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp uno float [[A:%.*]], 0.000000e+00
-; CHECK-NEXT: [[CLASS2:%.*]] = fcmp oeq float [[A]], 0xFFF0000000000000
-; CHECK-NEXT: [[XOR_1:%.*]] = xor i1 [[CLASS0]], [[CLASS2]]
-; CHECK-NEXT: ret i1 [[XOR_1]]
+; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
+; CHECK-NEXT: ret i1 [[CLASS2]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2)
@@ -1337,24 +1335,7 @@ define i1 @test_fold_xor3_class_f32_0(float %a) {
define i1 @test_fold_xor_all_tests_class_f32_0(float %a) {
; CHECK-LABEL: @test_fold_xor_all_tests_class_f32_0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp uno float [[A:%.*]], 0.000000e+00
-; CHECK-NEXT: [[CLASS2:%.*]] = fcmp oeq float [[A]], 0xFFF0000000000000
-; CHECK-NEXT: [[CLASS3:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
-; CHECK-NEXT: [[CLASS4:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 16)
-; CHECK-NEXT: [[CLASS5:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 32)
-; CHECK-NEXT: [[CLASS6:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 64)
-; CHECK-NEXT: [[CLASS7:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 128)
-; CHECK-NEXT: [[CLASS8:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 256)
-; CHECK-NEXT: [[CLASS9:%.*]] = fcmp oeq float [[A]], 0x7FF0000000000000
-; CHECK-NEXT: [[XOR_1:%.*]] = xor i1 [[CLASS0]], [[CLASS2]]
-; CHECK-NEXT: [[XOR_2:%.*]] = xor i1 [[XOR_1]], [[CLASS3]]
-; CHECK-NEXT: [[XOR_3:%.*]] = xor i1 [[XOR_2]], [[CLASS4]]
-; CHECK-NEXT: [[XOR_4:%.*]] = xor i1 [[XOR_3]], [[CLASS5]]
-; CHECK-NEXT: [[XOR_5:%.*]] = xor i1 [[XOR_4]], [[CLASS6]]
-; CHECK-NEXT: [[XOR_6:%.*]] = xor i1 [[XOR_5]], [[CLASS7]]
-; CHECK-NEXT: [[XOR_7:%.*]] = xor i1 [[XOR_6]], [[CLASS8]]
-; CHECK-NEXT: [[XOR_8:%.*]] = xor i1 [[XOR_7]], [[CLASS9]]
-; CHECK-NEXT: ret i1 [[XOR_8]]
+; CHECK-NEXT: ret i1 true
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 1)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 2)
@@ -1380,8 +1361,8 @@ define i1 @test_fold_xor_all_tests_class_f32_0(float %a) {
define i1 @test_fold_xor_class_f32_1(float %a) {
; CHECK-LABEL: @test_fold_xor_class_f32_1(
-; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12)
-; CHECK-NEXT: ret i1 [[CLASS1]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 12)
+; CHECK-NEXT: ret i1 [[CLASS0]]
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 4)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 8)
@@ -1391,7 +1372,7 @@ define i1 @test_fold_xor_class_f32_1(float %a) {
define i1 @test_no_fold_xor_class_f32_multi_use0(float %a, ptr %ptr) {
; CHECK-LABEL: @test_no_fold_xor_class_f32_multi_use0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]]
@@ -1406,7 +1387,7 @@ define i1 @test_no_fold_xor_class_f32_multi_use0(float %a, ptr %ptr) {
define i1 @test_no_fold_xor_class_f32_multi_use1(float %a, ptr %ptr) {
; CHECK-LABEL: @test_no_fold_xor_class_f32_multi_use1(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]]
@@ -1421,10 +1402,7 @@ define i1 @test_no_fold_xor_class_f32_multi_use1(float %a, ptr %ptr) {
define i1 @test_fold_xor_class_f32_2(float %a) {
; CHECK-LABEL: @test_fold_xor_class_f32_2(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp ueq float [[A:%.*]], 0xFFF0000000000000
-; CHECK-NEXT: [[CLASS1:%.*]] = fcmp ueq float [[A]], 0xFFF0000000000000
-; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]]
-; CHECK-NEXT: ret i1 [[XOR]]
+; CHECK-NEXT: ret i1 false
;
%class0 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
%class1 = call i1 @llvm.is.fpclass.f32(float %a, i32 7)
@@ -1434,7 +1412,7 @@ define i1 @test_fold_xor_class_f32_2(float %a) {
define i1 @test_no_fold_xor_class_f32_0(float %a, float %b) {
; CHECK-LABEL: @test_no_fold_xor_class_f32_0(
-; CHECK-NEXT: [[CLASS0:%.*]] = fcmp oeq float [[A:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8)
; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[CLASS0]], [[CLASS1]]
; CHECK-NEXT: ret i1 [[XOR]]
@@ -1447,8 +1425,8 @@ define i1 @test_no_fold_xor_class_f32_0(float %a, float %b) {
define <2 x i1> @test_fold_xor_class_v2f32(<2 x float> %a) {
; CHECK-LABEL: @test_fold_xor_class_v2f32(
-; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 9)
-; CHECK-NEXT: ret <2 x i1> [[CLASS1]]
+; CHECK-NEXT: [[CLASS0:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 9)
+; CHECK-NEXT: ret <2 x i1> [[CLASS0]]
;
%class0 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 4)
%class1 = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> %a, i32 13)
@@ -1505,7 +1483,7 @@ define i1 @test_class_fneg_qnan(float %arg) {
; -> posinf
define i1 @test_class_fneg_neginf(float %arg) {
; CHECK-LABEL: @test_class_fneg_neginf(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0x7FF0000000000000
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 512)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fneg = fneg float %arg
@@ -1582,7 +1560,7 @@ define i1 @test_class_fneg_posnormal(float %arg) {
; -> neginf
define i1 @test_class_fneg_posinf(float %arg) {
; CHECK-LABEL: @test_class_fneg_posinf(
-; CHECK-NEXT: [[CLASS:%.*]] = fcmp oeq float [[ARG:%.*]], 0xFFF0000000000000
+; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[ARG:%.*]], i32 4)
; CHECK-NEXT: ret i1 [[CLASS]]
;
%fneg = fneg float %arg
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